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Searched refs:DRAM_PHY_CFG_REG (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training.c444 DRAM_PHY_CFG_REG, 0x28, 0x3e)); in hws_ddr3_tip_init_controller()
449 DRAM_PHY_CFG_REG, 0x0, in hws_ddr3_tip_init_controller()
639 DRAM_PHY_CFG_REG, data_read, 0x30)); in hws_ddr3_tip_init_controller()
1230 (dev_num, access_type, if_id, DRAM_PHY_CFG_REG, in adll_calibration()
1234 (dev_num, access_type, if_id, DRAM_PHY_CFG_REG, in adll_calibration()
1518 DRAM_PHY_CFG_REG, 0, in ddr3_tip_freq_set()
1523 DRAM_PHY_CFG_REG, (0x80000000 | 0x40000000), in ddr3_tip_freq_set()
Dmv_ddr_regs.h271 #define DRAM_PHY_CFG_REG 0x15ec macro