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Searched refs:DRPAUSE (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/fpga/
Divm_core.c64 unsigned char g_ucEndDR = DRPAUSE;
253 { RESET, DRPAUSE, 0x50, 5 },
256 { IDLE, DRPAUSE, 0xA0, 4 },
258 { DRPAUSE, RESET, 0xF8, 5 }, /* Transitions from DRPAUSE */
259 { DRPAUSE, IDLE, 0xC0, 3 },
260 { DRPAUSE, IRPAUSE, 0xF4, 7 },
261 { DRPAUSE, DRPAUSE, 0xE8, 6 },/* 06/14/06 Support POLL STATUS LOOP*/
264 { IRPAUSE, DRPAUSE, 0xE8, 6 },
265 { DRPAUSE, SHIFTDR, 0x80, 2 }, /* Extra transitions using SHIFTDR */
267 { SHIFTDR, DRPAUSE, 0x80, 2 },
[all …]
/external/u-boot/include/
Dlattice.h32 #define DRPAUSE 0x03 macro