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Searched refs:DRegister (Results 1 – 22 of 22) sorted by relevance

/external/vixl/src/aarch32/
Ddisasm-aarch32.h166 DRegister reg_;
170 IndexedRegisterPrinter(DRegister reg, uint32_t index) in IndexedRegisterPrinter()
172 DRegister GetReg() const { return reg_; } in GetReg()
347 virtual DisassemblerStream& operator<<(DRegister reg) {
1449 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1455 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1458 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
1464 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
1466 void vabs(Condition cond, DataType dt, DRegister rd, DRegister rm);
1473 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
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Dassembler-aarch32.h368 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm);
372 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm);
375 DRegister rd,
376 DRegister rm);
388 Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm);
390 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm);
393 DRegister rd,
394 DRegister rn,
407 DRegister rd,
410 Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm);
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Ddisasm-aarch32.cc3725 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vaba()
3739 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vabal()
3746 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vabd()
3768 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vabdl()
3776 DRegister rd, in vabs()
3777 DRegister rm) { in vabs()
3802 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacge()
3824 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacgt()
3846 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacle()
3868 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vaclt()
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Dmacro-assembler-aarch32.h704 void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) { in Vldr()
723 void Vldr(DataType dt, DRegister rd, RawLiteral* literal) { in Vldr()
726 void Vldr(Condition cond, DRegister rd, RawLiteral* literal) { in Vldr()
729 void Vldr(DRegister rd, RawLiteral* literal) { in Vldr()
801 void Vldr(Condition cond, DRegister rd, double v) { in Vldr()
809 void Vldr(DRegister rd, double v) { Vldr(al, rd, v); } in Vldr()
811 void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); } in Vmov()
812 void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); } in Vmov()
920 DRegister rd,
966 DRegister rd,
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Dinstructions-aarch32.h175 class DRegister; variable
185 DRegister D() const;
219 class DRegister : public VRegister {
221 DRegister() : VRegister(kNoRegister, 0, kDRegSizeInBits) {} in DRegister() function
222 explicit DRegister(uint32_t code) in DRegister() function
245 inline std::ostream& operator<<(std::ostream& os, const DRegister reg) {
323 class DRegisterLane : public DRegister {
327 DRegisterLane(DRegister reg, uint32_t lane) in DRegisterLane()
328 : DRegister(reg.GetCode()), lane_(lane) {} in DRegisterLane()
329 DRegisterLane(uint32_t code, uint32_t lane) : DRegister(code), lane_(lane) {} in DRegisterLane()
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Dinstructions-aarch32.cc85 DRegister VRegister::D() const { in D()
87 return DRegister(GetCode()); in D()
140 DRegister VRegisterList::GetFirstAvailableDRegister() const { in GetFirstAvailableDRegister()
142 if (((list_ >> (i * 2)) & 0x3) == 0x3) return DRegister(i); in GetFirstAvailableDRegister()
144 return DRegister(); in GetFirstAvailableDRegister()
168 DRegister first = reglist.GetFirstDRegister(); in operator <<()
169 DRegister last = reglist.GetLastDRegister(); in operator <<()
178 DRegister first = nreglist.GetFirstDRegister(); in operator <<()
201 first = DRegister(next); in operator <<()
Dassembler-aarch32.cc4375 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx()
4388 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx()
4409 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax()
4423 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax()
4446 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmdbx()
4459 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmdbx()
4480 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmiax()
4494 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmiax()
13885 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vaba()
13945 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vabal()
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Dmacro-assembler-aarch32.cc124 DRegister UseScratchRegisterScope::AcquireD() { in AcquireD()
126 DRegister reg = in AcquireD()
621 Vpush(Untyped64, DRegisterList(DRegister(reg.GetCode()))); in PushRegister()
646 Vcvt(F64, F32, DRegister(*vfp_count), SRegister(*vfp_count * 2)); in PreparePrintfArgument()
652 Vpop(Untyped64, DRegisterList(DRegister(*vfp_count))); in PreparePrintfArgument()
1347 DRegister rd, in Delegate()
2168 DRegister rd, in Delegate()
2263 DRegister rd, in Delegate()
Doperands-aarch32.h490 DOperand(DRegister rm) // NOLINT(runtime/explicit) in DOperand()
493 DRegister GetRegister() const { in GetRegister()
495 return DRegister(rm_.GetCode()); in GetRegister()
/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h630 void vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond = AL);
632 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL);
634 void vmovdr(DRegister dd, int i, Register rt, Condition cond = AL);
638 void vmovd(DRegister dd, DRegister dm, Condition cond = AL);
647 bool vmovd(DRegister dd, double d_imm, Condition cond = AL);
655 void vldrd(DRegister dd, Address ad, Condition cond = AL);
658 void vstrd(DRegister dd, Address ad, Condition cond = AL);
667 DRegister first, intptr_t count, Condition cond = AL);
669 DRegister first, intptr_t count, Condition cond = AL);
675 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL);
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Dassembler_arm.cc688 void Assembler::vmovdr(DRegister dn, int i, Register rt, Condition cond) {
706 void Assembler::vmovdrr(DRegister dm, Register rt, Register rt2,
727 void Assembler::vmovrrd(Register rt, Register rt2, DRegister dm,
775 void Assembler::vldrd(DRegister dd, Address ad, Condition cond) {
788 void Assembler::vstrd(DRegister dd, Address ad, Condition cond) { in vstrd()
829 DRegister start, in EmitMultiVDMemOp()
867 DRegister first, intptr_t count, Condition cond) { in vldmd()
876 DRegister first, intptr_t count, Condition cond) { in vstmd()
905 DRegister dd, DRegister dn, DRegister dm) {
928 void Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) {
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/external/vixl/test/aarch32/
Dtest-assembler-cond-dt-drt-drd-drn-drm-float-not-f16-a32.cc68 DRegister rd;
69 DRegister rn;
70 DRegister rm;
208 DRegister rd,
209 DRegister rn,
210 DRegister rm);
223 DRegister rd = kTests[i].operands.rd; in TestHelper()
224 DRegister rn = kTests[i].operands.rn; in TestHelper()
225 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-assembler-cond-dt-drt-drd-drn-drm-float-f32-only-t32.cc77 DRegister rd;
78 DRegister rn;
79 DRegister rm;
226 DRegister rd,
227 DRegister rn,
228 DRegister rm);
241 DRegister rd = kTests[i].operands.rd; in TestHelper()
242 DRegister rn = kTests[i].operands.rn; in TestHelper()
243 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-assembler-cond-dt-drt-drd-drn-drm-float-not-f16-t32.cc68 DRegister rd;
69 DRegister rn;
70 DRegister rm;
208 DRegister rd,
209 DRegister rn,
210 DRegister rm);
223 DRegister rd = kTests[i].operands.rd; in TestHelper()
224 DRegister rn = kTests[i].operands.rn; in TestHelper()
225 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-assembler-cond-dt-drt-drd-drn-drm-float-f32-only-a32.cc77 DRegister rd;
78 DRegister rn;
79 DRegister rm;
226 DRegister rd,
227 DRegister rn,
228 DRegister rm);
241 DRegister rd = kTests[i].operands.rd; in TestHelper()
242 DRegister rn = kTests[i].operands.rn; in TestHelper()
243 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-utils-aarch32.cc73 DRegister rt(i); in Dump()
145 const DRegister& dreg) { in Equal64()
236 const DRegister& dreg) { in EqualFP64()
Dtest-simulator-cond-dt-drt-drd-drn-drm-float-f64-t32.cc133 DRegister rd;
134 DRegister rn;
135 DRegister rm;
1385 DRegister rd,
1386 DRegister rn,
1387 DRegister rm);
1423 DRegister rd = kTests[i].operands.rd; in TestHelper()
1424 DRegister rn = kTests[i].operands.rn; in TestHelper()
1425 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-simulator-cond-dt-drt-drd-drn-drm-float-f64-a32.cc133 DRegister rd;
134 DRegister rn;
135 DRegister rm;
1385 DRegister rd,
1386 DRegister rn,
1387 DRegister rm);
1423 DRegister rd = kTests[i].operands.rd; in TestHelper()
1424 DRegister rn = kTests[i].operands.rn; in TestHelper()
1425 DRegister rm = kTests[i].operands.rm; in TestHelper()
Dtest-utils-aarch32.h191 const DRegister& dreg);
199 const DRegister& dreg);
Dtest-assembler-aarch32.cc3397 VIXL_CHECK(masm.AliasesAvailableScratchRegister(DRegister(s / 2))); in TEST()
3408 if (temps.IsAvailable(DRegister(d))) { in TEST()
3409 VIXL_CHECK(masm.AliasesAvailableScratchRegister(DRegister(d))); in TEST()
3413 VIXL_CHECK(!masm.AliasesAvailableScratchRegister(DRegister(d))); in TEST()
/external/vixl/examples/aarch32/
Dmandelbrot.cc49 const DRegister kStars = d6; in GenerateMandelBrot()
50 const DRegister kSpaces = d7; in GenerateMandelBrot()
103 const DRegister kLowerFlags = d4; in GenerateMandelBrot()
/external/swiftshader/third_party/subzero/src/
DIceRegistersARM32.h65 enum DRegister { enum
195 static inline DRegister getEncodedDReg(RegNumT RegNum) { in getEncodedDReg()
197 return DRegister(RegTable[RegNum].Encoding); in getEncodedDReg()