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Searched refs:DWORDADDR (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h228 DWORDADDR, enumerator
DAMDGPUInstrInfo.td53 def AMDGPUdwordaddr : SDNode<"AMDGPUISD::DWORDADDR", SDTIntUnaryOp>;
DR600ISelLowering.cpp1406 } else if (Ptr->getOpcode() != AMDGPUISD::DWORDADDR && in LowerSTORE()
1409 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, Ptr.getValueType(), in LowerSTORE()
DR600Instructions.td1722 // DWORDADDR pattern
DAMDGPUISelLowering.cpp2805 NODE_NAME_CASE(DWORDADDR) in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp1309 } else if (Ptr->getOpcode() != AMDGPUISD::DWORDADDR && VT.bitsGE(MVT::i32)) { in LowerSTORE()
1311 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, PtrVT, DWordAddr); in LowerSTORE()
1331 if (Ptr.getOpcode() != AMDGPUISD::DWORDADDR) { in LowerSTORE()
1332 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, PtrVT, DWordAddr); in LowerSTORE()
1517 if (Ptr.getOpcode() != AMDGPUISD::DWORDADDR) { in LowerLOAD()
1520 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, MVT::i32, Ptr); in LowerLOAD()
DAMDGPUISelLowering.h339 DWORDADDR, enumerator
DAMDGPUInstrInfo.td122 def AMDGPUdwordaddr : SDNode<"AMDGPUISD::DWORDADDR", SDTIntUnaryOp>;
DAMDGPUISelDAGToDAG.cpp677 } else if ((Addr.getOpcode() == AMDGPUISD::DWORDADDR) && in SelectADDRIndirect()
2226 } else if ((Addr.getOpcode() == AMDGPUISD::DWORDADDR) && in SelectADDRIndirect()
DR600Instructions.td1744 // DWORDADDR pattern
DAMDGPUISelLowering.cpp4006 NODE_NAME_CASE(DWORDADDR) in getTargetNodeName()