Home
last modified time | relevance | path

Searched refs:DW_OP_breg0 (Results 1 – 25 of 29) sorted by relevance

12

/external/libunwind/src/dwarf/
DGexpr.c67 [DW_OP_breg0 + 0] = OPND1 (SLEB128),
68 [DW_OP_breg0 + 1] = OPND1 (SLEB128),
69 [DW_OP_breg0 + 2] = OPND1 (SLEB128),
70 [DW_OP_breg0 + 3] = OPND1 (SLEB128),
71 [DW_OP_breg0 + 4] = OPND1 (SLEB128),
72 [DW_OP_breg0 + 5] = OPND1 (SLEB128),
73 [DW_OP_breg0 + 6] = OPND1 (SLEB128),
74 [DW_OP_breg0 + 7] = OPND1 (SLEB128),
75 [DW_OP_breg0 + 8] = OPND1 (SLEB128),
76 [DW_OP_breg0 + 9] = OPND1 (SLEB128),
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/
DDWARFExpression.cpp77 for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA) in getDescriptions()
201 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx) in prettyPrintRegisterOp()
202 DwarfRegNum = Opcode - DW_OP_breg0; in prettyPrintRegisterOp()
209 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in prettyPrintRegisterOp()
234 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in print()
/external/elfutils/backends/
Di386_retval.c61 { .atom = DW_OP_breg0, .number = 0 }
Darm_retval.c56 { .atom = DW_OP_breg0, .number = 0 }
Dalpha_retval.c61 { .atom = DW_OP_breg0, .number = 0 }
Dtilegx_retval.c54 { .atom = DW_OP_breg0, .number = 0 }
Dx86_64_retval.c74 { .atom = DW_OP_breg0, .number = 0 }
Daarch64_retval.c208 static const Dwarf_Op loc[] = { { .atom = DW_OP_breg0 } }; in pass_by_ref()
/external/libunwind_llvm/src/
Ddwarf2.h190 DW_OP_breg0 = 0x70, // base register 0 + SLEB128 offset enumerator
DDwarfInstructions.hpp692 case DW_OP_breg0: in evaluateExpression()
724 reg = static_cast<uint32_t>(opcode - DW_OP_breg0); in evaluateExpression()
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/X86/
Ddw_op_minus_direct.ll20 ; CHECK-NEXT: [0x0000000000000000, 0x0000000000000004): DW_OP_breg0 RAX+0, DW_OP_constu 0xfffffff…
Ddebug-loc-offset.ll46 ; CHECK-NEXT: [0x00000020, 0x00000037): DW_OP_breg0 EAX+0, DW_OP_deref
74 ; CHECK-NEXT: [0x00000000, 0x00000017): DW_OP_breg0 EAX+0, DW_OP_deref
Dthis-stack_value.ll21 ; CHECK: DW_AT_location {{.*}} (DW_OP_breg0 RAX+0, DW_OP_stack_value)
/external/llvm/test/DebugInfo/AArch64/
Dstruct_by_value.ll7 ; 112 = 0x70 = DW_OP_breg0
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/AArch64/
Dstruct_by_value.ll7 ; 112 = 0x70 = DW_OP_breg0
/external/elfutils/libdwfl/
Dframe_unwind.c228 case DW_OP_breg0 ... DW_OP_breg31: in expr_eval()
229 if (! state_get_reg (state, op->atom - DW_OP_breg0, &val1)) in expr_eval()
/external/llvm/lib/CodeGen/AsmPrinter/
DDwarfExpression.cpp38 EmitOp(dwarf::DW_OP_breg0 + DwarfReg); in AddRegIndirect()
/external/google-breakpad/src/common/dwarf/
Ddwarf2enums.h444 DW_OP_breg0 =0x70, enumerator
/external/libunwind/include/
Ddwarf.h117 DW_OP_breg0 = 0x70, enumerator
/external/swiftshader/third_party/LLVM/lib/Support/
DDwarf.cpp396 case DW_OP_breg0: return "DW_OP_breg0"; in OperationEncodingString()
/external/swiftshader/third_party/LLVM/include/llvm/Support/
DDwarf.h407 DW_OP_breg0 = 0x70, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/
DDwarfExpression.cpp44 emitOp(dwarf::DW_OP_breg0 + DwarfReg); in addBReg()
/external/elfutils/libdw/
Ddwarf.h532 DW_OP_breg0 = 0x70, /* Base register 0. */ enumerator
Ddwarf_getlocation.c472 case DW_OP_breg0 ... DW_OP_breg31: in __libdw_intern_expression()
/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/
DDwarfCompileUnit.cpp232 addUInt(TheDie, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_breg0 + DWReg); in addRegisterOffset()
407 addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_breg0 + Reg); in addBlockByrefAddress()

12