Searched refs:DW_OP_reg0 (Results 1 – 25 of 41) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-dwarfdump/X86/ |
| D | debug_loc_offset.test | 8 # CHECK-A-NEXT: [0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
17 # CHECK-B-NEXT: [0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX
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| D | debugloc.s | 13 # CHECK-NEXT: [0x0000000000000003, 0x0000000000000004): DW_OP_reg0 RAX
17 # CHECK-NEXT: [0x0000000000000013, 0x0000000000000014): DW_OP_reg0 RAX
93 .byte 80 # DW_OP_reg0
104 .byte 80 # DW_OP_reg0
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| D | gnu_call_site.s | 18 # CHECK-NEXT: DW_AT_location (DW_OP_reg0 EAX)
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/X86/ |
| D | dwarfdump-debug-loc-simple.test | 11 CHECK-NEXT: [0x00000000, 0x00000020): DW_OP_reg0 EAX
21 CHECK-NEXT: [0x00000000, 0x00000020): DW_OP_reg0 EAX
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| D | fission-ranges.ll | 31 ; CHECK-NEXT: Addr idx 3 (w/ length 25): DW_OP_reg0 RAX
33 ; CHECK-NEXT: Addr idx 4 (w/ length 19): DW_OP_reg0 RAX
35 ; CHECK-NEXT: Addr idx 5 (w/ length 17): DW_OP_reg0 RAX
37 ; CHECK-NEXT: Addr idx 6 (w/ length 17): DW_OP_reg0 RAX
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| D | subreg.ll | 6 ; CHECK: .byte 80 # super-register DW_OP_reg0
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| D | single-dbg_value.ll | 9 ; CHECK-NEXT: {{.*}}: DW_OP_reg0 RAX)
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| D | dbg-value-const-byref.ll | 27 ; CHECK-NEXT: [0x[[C2]], 0x[[R1:.*]]): DW_OP_reg0 RAX
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| D | pieces-2.ll | 21 ; CHECK-NEXT: [0x0000000000000004, 0x0000000000000005): DW_OP_reg0 RAX, DW_OP_piece 0x4)
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFExpression.cpp | 75 for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA) in getDescriptions()
204 DwarfRegNum = Opcode - DW_OP_reg0; in prettyPrintRegisterOp()
235 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) || in print()
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| /external/elfutils/backends/ |
| D | i386_retval.c | 43 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 4 },
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| D | arm_retval.c | 43 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 4 },
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| D | sh_retval.c | 48 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 4 },
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| D | alpha_retval.c | 43 { .atom = DW_OP_reg0 }
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| D | m68k_retval.c | 43 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 4 },
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| D | tilegx_retval.c | 45 { .atom = DW_OP_reg0 }
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| D | x86_64_retval.c | 43 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 8 },
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| D | aarch64_retval.c | 197 { .atom = DW_OP_reg0 }, { .atom = DW_OP_piece, .number = 8 }, in pass_in_gpr()
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| /external/libunwind/src/dwarf/ |
| D | Gexpr.c | 310 case DW_OP_reg0: case DW_OP_reg1: case DW_OP_reg2: in dwarf_eval_expr()
321 Debug (15, "OP_reg(r%d)\n", (int) opcode - DW_OP_reg0); in dwarf_eval_expr()
322 *valp = dwarf_to_unw_regnum (opcode - DW_OP_reg0); in dwarf_eval_expr()
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| /external/llvm/test/DebugInfo/X86/ |
| D | subreg.ll | 6 ; CHECK: .byte 80 # super-register DW_OP_reg0
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| /external/libunwind_llvm/src/ |
| D | dwarf2.h | 158 DW_OP_reg0 = 0x50, // Contents of reg0 enumerator
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| /external/swiftshader/third_party/LLVM/test/DebugInfo/X86/ |
| D | subreg.ll | 7 ; CHECK: .byte 80 # DW_OP_reg0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/AArch64/ |
| D | dagcombine-zext.ll | 2 ; CHECK: DW_OP_reg0 W0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/ARM/ |
| D | PR16736.ll | 8 ; DWARF-NEXT: DW_OP_reg0 R0
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| /external/elfutils/libdwfl/ |
| D | frame_unwind.c | 213 case DW_OP_reg0 ... DW_OP_reg31: in expr_eval()
214 if (! state_get_reg (state, op->atom - DW_OP_reg0, &val1) in expr_eval()
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