Searched refs:DefMCID (Results 1 – 7 of 7) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelDAGToDAG.cpp | 149 const MCInstrDesc &DefMCID = TII.get(NI->getMachineOpcode()); in FixRegisterClasses() local
154 if (UI.getUse().getResNo() >= DefMCID.getNumDefs()) in FixRegisterClasses()
157 TII.getRegClass(DefMCID, UI.getUse().getResNo(), TRI); in FixRegisterClasses()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 2083 const MCInstrDesc &DefMCID, in getVLDMDefCycle() argument
2086 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getVLDMDefCycle()
2101 switch (DefMCID.getOpcode()) { in getVLDMDefCycle()
2124 const MCInstrDesc &DefMCID, in getLDMDefCycle() argument
2127 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getLDMDefCycle()
2228 const MCInstrDesc &DefMCID, in getOperandLatency() argument
2232 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency()
2235 if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands()) in getOperandLatency()
2243 switch (DefMCID.getOpcode()) { in getOperandLatency()
2254 DefCycle = getVLDMDefCycle(ItinData, DefMCID, DefClass, DefIdx, DefAlign); in getOperandLatency()
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| D | ARMBaseInstrInfo.h | 223 const MCInstrDesc &DefMCID,
227 const MCInstrDesc &DefMCID,
239 const MCInstrDesc &DefMCID,
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 307 const MCInstrDesc &DefMCID,
311 const MCInstrDesc &DefMCID,
323 const MCInstrDesc &DefMCID,
330 const MCInstrDesc &DefMCID, unsigned DefAdj,
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| D | ARMBaseInstrInfo.cpp | 2653 const MCInstrDesc &DefMCID = DefMI.getDesc(); in FoldImmediate() local
2654 if (DefMCID.hasOptionalDef()) { in FoldImmediate()
2655 unsigned NumOps = DefMCID.getNumOperands(); in FoldImmediate()
3185 const MCInstrDesc &DefMCID, in getVLDMDefCycle() argument
3188 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getVLDMDefCycle()
3203 switch (DefMCID.getOpcode()) { in getVLDMDefCycle()
3226 const MCInstrDesc &DefMCID, in getLDMDefCycle() argument
3229 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getLDMDefCycle()
3330 const MCInstrDesc &DefMCID, in getOperandLatency() argument
3334 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 338 const MCInstrDesc &DefMCID,
342 const MCInstrDesc &DefMCID,
354 const MCInstrDesc &DefMCID,
361 const MCInstrDesc &DefMCID, unsigned DefAdj,
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| D | ARMBaseInstrInfo.cpp | 2986 const MCInstrDesc &DefMCID = DefMI.getDesc(); in FoldImmediate() local
2987 if (DefMCID.hasOptionalDef()) { in FoldImmediate()
2988 unsigned NumOps = DefMCID.getNumOperands(); in FoldImmediate()
3515 const MCInstrDesc &DefMCID, in getVLDMDefCycle() argument
3518 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getVLDMDefCycle()
3533 switch (DefMCID.getOpcode()) { in getVLDMDefCycle()
3572 const MCInstrDesc &DefMCID, in getLDMDefCycle() argument
3575 int RegNo = (int)(DefIdx+1) - DefMCID.getNumOperands() + 1; in getLDMDefCycle()
3676 const MCInstrDesc &DefMCID, in getOperandLatency() argument
3680 unsigned DefClass = DefMCID.getSchedClass(); in getOperandLatency()
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