| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 291 unsigned DefSubReg, in shareSameRegisterFile() argument
300 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
301 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
308 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
321 unsigned DefSubReg, in shouldRewriteCopySrc() argument
325 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | PeepholeOptimizer.cpp | 298 unsigned DefSubReg; member in __anond69149540111::ValueTracker
350 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
354 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
369 ValueTracker(const MachineInstr &MI, unsigned DefIdx, unsigned DefSubReg, in ValueTracker() argument
373 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
1672 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1691 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1749 if (RegSeqInput.SubIdx == DefSubReg) { in getNextSourceFromRegSequence()
1791 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1809 (TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 352 unsigned DefSubReg, in shareSameRegisterFile() argument
361 if (SrcSubReg && DefSubReg) { in shareSameRegisterFile()
362 return TRI.getCommonSuperRegClass(SrcRC, SrcSubReg, DefRC, DefSubReg, in shareSameRegisterFile()
369 std::swap(DefSubReg, SrcSubReg); in shareSameRegisterFile()
382 unsigned DefSubReg, in shouldRewriteCopySrc() argument
386 return shareSameRegisterFile(*this, DefRC, DefSubReg, SrcRC, SrcSubReg); in shouldRewriteCopySrc()
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| D | PeepholeOptimizer.cpp | 373 unsigned DefSubReg; member in __anon5d64f7ac0111::ValueTracker
418 ValueTracker(unsigned Reg, unsigned DefSubReg, in ValueTracker() argument
421 : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) { in ValueTracker()
1814 if (Def->getOperand(DefIdx).getSubReg() != DefSubReg) in getNextSourceFromCopy()
1836 if (DefOp.getSubReg() != DefSubReg) in getNextSourceFromBitcast()
1904 if (RegSeqInput.SubIdx == DefSubReg) { in getNextSourceFromRegSequence()
1946 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1964 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
1969 return ValueTrackerResult(BaseReg.Reg, DefSubReg); in getNextSourceFromInsertSubreg()
1980 if (DefSubReg) in getNextSourceFromExtractSubreg()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 136 unsigned DefSubReg,
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| D | SIRegisterInfo.cpp | 809 unsigned DefSubReg, in shouldRewriteCopySrc() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 168 unsigned DefSubReg,
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| D | SIRegisterInfo.cpp | 1356 unsigned DefSubReg, in shouldRewriteCopySrc() argument
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| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 518 unsigned DefSubReg,
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 553 unsigned DefSubReg,
|