Searched refs:DstIsDead (Results 1 – 6 of 6) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRExpandPseudoInsts.cpp | 146 bool DstIsDead = MI.getOperand(0).isDead(); in expandArith() local
154 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
159 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
179 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogic() local
187 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
195 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
225 bool DstIsDead = MI.getOperand(0).isDead(); in expandLogicImm() local
235 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
245 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
277 bool DstIsDead = MI.getOperand(0).isDead(); in expand() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 421 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD() local
425 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) in ExpandVLD()
426 .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
428 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
430 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
461 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
547 bool DstIsDead = false; in ExpandLaneOp() local
549 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp()
552 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
554 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 405 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD() local
409 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
411 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
413 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
415 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
446 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
537 bool DstIsDead = false; in ExpandLaneOp() local
539 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp()
542 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
544 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 483 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD() local
498 MIB.addReg(DstRegPair, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
502 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
504 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
506 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
508 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
569 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
682 bool DstIsDead = false; in ExpandLaneOp() local
684 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp()
687 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 128 const bool DstIsDead = MI.getOperand(0).isDead(); in tryOrrMovk() local
131 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk()
193 const bool DstIsDead = MI.getOperand(0).isDead(); in tryToreplicateChunks() local
209 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
233 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
376 const bool DstIsDead = MI.getOperand(0).isDead(); in trySequenceOfOnes() local
383 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
399 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
552 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm() local
556 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 164 const bool DstIsDead = MI.getOperand(0).isDead(); in tryToreplicateChunks() local
180 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
204 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
346 const bool DstIsDead = MI.getOperand(0).isDead(); in trySequenceOfOnes() local
353 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
369 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
465 const bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm() local
468 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandMOVImm()
549 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImmSimple() local
553 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImmSimple()
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