| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 113 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx); in LowerSubregToReg() local
122 if (DstSubReg == InsReg) { in LowerSubregToReg()
136 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg, in LowerSubregToReg()
140 TransferDeadFlag(MI, DstSubReg, TRI); in LowerSubregToReg()
|
| D | RegAllocLinearScan.cpp | 998 unsigned DstSubReg = CopyMI->getOperand(0).getSubReg(); in assignRegOrStackSlotAtInterval() local
1009 if (DstSubReg) in assignRegOrStackSlotAtInterval()
1010 Reg = tri_->getMatchingSuperReg(Reg, DstSubReg, RC); in assignRegOrStackSlotAtInterval()
|
| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 93 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx); in LowerSubregToReg() local
108 if (DstSubReg == InsReg) { in LowerSubregToReg()
122 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg, in LowerSubregToReg()
|
| D | RegisterCoalescer.cpp | 2836 unsigned DstReg, DstSubReg, SrcReg, SrcSubReg; in applyTerminalRule() local
2837 isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg); in applyTerminalRule()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 89 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx); in LowerSubregToReg() local
104 if (DstSubReg == InsReg) { in LowerSubregToReg()
118 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg, in LowerSubregToReg()
|
| D | RegisterCoalescer.cpp | 3330 unsigned DstReg, DstSubReg, SrcReg, SrcSubReg; in applyTerminalRule() local
3331 isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg); in applyTerminalRule()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.h | 67 unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg,
|
| D | HexagonRegisterInfo.cpp | 249 const TargetRegisterClass *DstRC, unsigned DstSubReg, in shouldCoalesce() argument
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZRegisterInfo.h | 85 unsigned DstSubReg,
|
| D | SystemZRegisterInfo.cpp | 251 unsigned DstSubReg, in shouldCoalesce() argument
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 194 unsigned DstSubReg,
|
| D | ARMBaseRegisterInfo.cpp | 787 unsigned DstSubReg, in shouldCoalesce() argument
794 if (!DstSubReg) in shouldCoalesce()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.h | 209 unsigned DstSubReg,
|
| D | ARMBaseRegisterInfo.cpp | 806 unsigned DstSubReg, in shouldCoalesce() argument
814 if (!DstSubReg) in shouldCoalesce()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 213 unsigned DstSubReg,
|
| D | SIRegisterInfo.cpp | 1515 unsigned DstSubReg, in shouldCoalesce() argument
|
| /external/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 923 unsigned DstSubReg, in shouldCoalesce() argument
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 979 unsigned DstSubReg, in shouldCoalesce() argument
|