| /external/mesa3d/src/mesa/x86/ |
| D | 3dnow_xform3.S | 45 MOV_L ( ARG_SOURCE, EAX )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
69 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */
70 MOVD ( REGOFF(8, EAX), MM2 ) /* | x2 */
72 ADD_L ( EDI, EAX ) /* next vertex */
73 PREFETCH ( REGIND(EAX) )
130 MOV_L ( ARG_SOURCE, EAX )
[all …]
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| D | 3dnow_xform4.S | 45 MOV_L ( ARG_SOURCE, EAX )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
69 MOVQ ( REGIND(EAX), MM0 ) /* x1 | x0 */
70 MOVQ ( REGOFF(8, EAX), MM4 ) /* x3 | x2 */
72 ADD_L ( EDI, EAX ) /* next vertex */
73 PREFETCH ( REGIND(EAX) )
138 MOV_L ( ARG_SOURCE, EAX )
[all …]
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| D | 3dnow_xform1.S | 45 MOV_L ( ARG_SOURCE, EAX )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
71 MOVD ( REGIND(EAX), MM4 ) /* | x0 */
84 ADD_L ( EDI, EAX ) /* next vertex */
110 MOV_L ( ARG_SOURCE, EAX )
113 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
120 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
[all …]
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| D | 3dnow_xform2.S | 45 MOV_L ( ARG_SOURCE, EAX )
48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
55 MOV_L ( REGOFF(V4F_COUNT, EAX), ESI )
56 MOV_L ( REGOFF(V4F_STRIDE, EAX), EDI )
57 MOV_L ( REGOFF(V4F_START, EAX), EAX )
80 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
90 MOVQ ( REGIND(EAX), MM6 ) /* x1 | x0 */
96 ADD_L ( EDI, EAX ) /* next vertex */
126 MOV_L ( ARG_SOURCE, EAX )
129 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
[all …]
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| D | common_x86_asm.S | 56 POP_L (EAX)
57 MOV_L (EAX, ECX)
58 XOR_L (CONST(0x00200000), EAX)
59 PUSH_L (EAX)
62 POP_L (EAX)
65 CMP_L (ECX, EAX)
67 XOR_L (CONST(0xff), EAX)
77 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
84 MOV_L (EAX, REGIND(EDI))
101 MOV_L (REGOFF(4, ESP), EAX) /* cpuid op */
[all …]
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| D | sse_xform1.S | 63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
90 ADD_L ( EAX, ESI )
119 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
142 ADD_L ( EAX, ESI )
172 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
203 ADD_L ( EAX, ESI )
233 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
263 ADD_L( EAX, ESI )
292 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
318 ADD_L ( EAX, ESI )
[all …]
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| D | sse_xform2.S | 63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
95 ADD_L ( EAX, ESI )
123 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
148 ADD_L ( EAX, ESI )
177 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
209 ADD_L ( EAX, ESI )
238 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
267 ADD_L( EAX, ESI )
297 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
330 ADD_L ( EAX, ESI )
[all …]
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| D | x86_xform2.S | 85 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
144 ADD_L( EAX, ESI )
177 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
209 ADD_L( EAX, ESI )
242 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
292 ADD_L( EAX, ESI )
325 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
361 ADD_L( EAX, ESI )
394 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
435 ADD_L( EAX, ESI )
[all …]
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| D | x86_xform3.S | 85 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
160 ADD_L( EAX, ESI )
193 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
240 ADD_L( EAX, ESI )
273 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
335 ADD_L( EAX, ESI )
368 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
408 ADD_L( EAX, ESI )
441 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX )
485 ADD_L( EAX, ESI )
[all …]
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| D | sse_xform3.S | 63 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
104 ADD_L ( EAX, ESI )
132 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
157 ADD_L ( EAX, ESI )
189 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
226 ADD_L ( EAX, ESI )
256 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
299 ADD_L( EAX, ESI )
329 MOV_L( REGOFF(V4F_STRIDE, ESI), EAX ) /* stride */
364 ADD_L ( EAX, ESI )
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | abi-isel.ll | 41 ; LINUX-64-STATIC: movl src(%rip), [[EAX:%e.x]]
42 ; LINUX-64-STATIC: movl [[EAX]], dst
46 ; LINUX-32-STATIC: movl src, [[EAX:%e.x]]
47 ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst
51 ; LINUX-32-PIC: movl src, [[EAX:%e.x]]
52 ; LINUX-32-PIC-NEXT: movl [[EAX]], dst
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
63 ; DARWIN-32-STATIC: movl _src, [[EAX:%e.x]]
64 ; DARWIN-32-STATIC-NEXT: movl [[EAX]], _dst
[all …]
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| D | 2008-08-31-EH_RETURN32.ll | 15 ; CHECK: movl 8(%ebp), %[[EAX:e..]]
16 ; CHECK: movl %[[ECX]], 4(%ebp,%[[EAX]])
17 ; CHECK: leal 4(%ebp,%[[EAX]]), %[[ECX2:e..]]
29 ; CHECK: movl 8(%ebp), %[[EAX:e..]]
30 ; CHECK: movl %[[ECX]], 4(%ebp,%[[EAX]])
31 ; CHECK: leal 4(%ebp,%[[EAX]]), %[[ECX2:e..]]
|
| D | anyext.ll | 11 ; X32-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
20 ; X64-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def>
38 ; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<def>
47 ; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<def>
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | abi-isel.ll | 41 ; LINUX-64-STATIC: movl src(%rip), [[EAX:%e.x]]
42 ; LINUX-64-STATIC: movl [[EAX]], dst
46 ; LINUX-32-STATIC: movl src, [[EAX:%e.x]]
47 ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst
51 ; LINUX-32-PIC: movl src, [[EAX:%e.x]]
52 ; LINUX-32-PIC-NEXT: movl [[EAX]], dst
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
63 ; DARWIN-32-STATIC: movl _src, [[EAX:%e.x]]
64 ; DARWIN-32-STATIC-NEXT: movl [[EAX]], _dst
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | abi-isel.ll | 41 ; LINUX-64-STATIC: movl src(%rip), [[EAX:%e.x]]
42 ; LINUX-64-STATIC: movl [[EAX]], dst
46 ; LINUX-32-STATIC: movl src, [[EAX:%e.x]]
47 ; LINUX-32-STATIC-NEXT: movl [[EAX]], dst
51 ; LINUX-32-PIC: movl src, [[EAX:%e.x]]
52 ; LINUX-32-PIC-NEXT: movl [[EAX]], dst
57 ; LINUX-64-PIC-NEXT: movl ([[RAX]]), [[EAX:%e..]]
59 ; LINUX-64-PIC-NEXT: movl [[EAX]], ([[RCX]])
63 ; DARWIN-32-STATIC: movl _src, [[EAX:%e.x]]
64 ; DARWIN-32-STATIC-NEXT: movl [[EAX]], _dst
[all …]
|
| D | 2008-08-31-EH_RETURN32.ll | 15 ; CHECK: movl 8(%ebp), %[[EAX:e..]]
16 ; CHECK: movl %[[ECX]], 4(%ebp,%[[EAX]])
17 ; CHECK: leal 4(%ebp,%[[EAX]]), %[[ECX2:e..]]
29 ; CHECK: movl 8(%ebp), %[[EAX:e..]]
30 ; CHECK: movl %[[ECX]], 4(%ebp,%[[EAX]])
31 ; CHECK: leal 4(%ebp,%[[EAX]]), %[[ECX2:e..]]
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax.s | 6 xor EAX, EAX
19 mov EAX, DWORD PTR [RSP - 4]
27 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
61 mov EAX, DWORD PTR FS:[RDI]
394 bt DWORD PTR [EAX], 1
395 bt DWORD PTR [EAX], 1
396 bts DWORD PTR [EAX], 1
397 btr DWORD PTR [EAX], 1
398 btc DWORD PTR [EAX], 1
418 div EAX, ECX
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Support/ |
| D | Host.cpp | 95 static void DetectX86FamilyModel(unsigned EAX, unsigned &Family, in DetectX86FamilyModel() argument
97 Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in DetectX86FamilyModel()
98 Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in DetectX86FamilyModel()
102 Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in DetectX86FamilyModel()
104 Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in DetectX86FamilyModel()
109 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUName() local
110 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) in getHostCPUName()
114 DetectX86FamilyModel(EAX, Family, Model); in getHostCPUName()
117 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in getHostCPUName()
125 GetX86CpuIDAndInfo(0, &EAX, text.u+0, text.u+2, text.u+1); in getHostCPUName()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | intel-syntax.s | 6 xor EAX, EAX
77 mov EAX, DWORD PTR [RSP - 4]
87 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
121 mov EAX, DWORD PTR FS:[RDI]
456 bt DWORD PTR [EAX], 1
457 bt DWORD PTR [EAX], 1
458 bts DWORD PTR [EAX], 1
459 btr DWORD PTR [EAX], 1
460 btc DWORD PTR [EAX], 1
480 div EAX, ECX
[all …]
|
| /external/lzma/C/ |
| D | CpuArch.c | 23 __asm pop EAX; in CheckFlag() local
24 __asm mov EDX, EAX; in CheckFlag() local
25 __asm xor EAX, flag; in CheckFlag() local
26 __asm push EAX; in CheckFlag() local
29 __asm pop EAX; in CheckFlag() local
30 __asm xor EAX, EDX; in CheckFlag() local
33 __asm and flag, EAX; in CheckFlag() local
68 __asm mov EAX, function; in MyCPUID() local
70 __asm mov a2, EAX; in MyCPUID() local
|
| /external/llvm/lib/Support/ |
| D | Host.cpp | 285 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
287 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
288 *Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in detectX86FamilyModel()
292 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
294 *Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in detectX86FamilyModel()
709 unsigned int EAX, EBX; in getAvailableFeatures() local
723 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) && in getAvailableFeatures()
724 ((EAX & 0x6) == 0x6); in getAvailableFeatures()
725 bool HasAVX512Save = HasAVX && ((EAX & 0xe0) == 0xe0); in getAvailableFeatures()
727 MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX); in getAvailableFeatures()
[all …]
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| /external/swiftshader/third_party/llvm-subzero/lib/Support/ |
| D | Host.cpp | 319 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
321 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
322 *Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in detectX86FamilyModel()
326 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
328 *Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in detectX86FamilyModel()
743 unsigned int EAX, EBX; in getAvailableFeatures() local
757 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) && in getAvailableFeatures()
758 ((EAX & 0x6) == 0x6); in getAvailableFeatures()
759 bool HasAVX512Save = HasAVX && ((EAX & 0xe0) == 0xe0); in getAvailableFeatures()
761 MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX); in getAvailableFeatures()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/tools/llvm-exegesis/X86/ |
| D | AssemblerTest.cpp | 17 using llvm::X86::EAX;
42 Check(MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX), 0x31, 0xc0, in TEST_F()
52 Check(MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00, 0x00, in TEST_F()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/ |
| D | Host.cpp | 483 static void detectX86FamilyModel(unsigned EAX, unsigned *Family, in detectX86FamilyModel() argument
485 *Family = (EAX >> 8) & 0xf; // Bits 8 - 11 in detectX86FamilyModel()
486 *Model = (EAX >> 4) & 0xf; // Bits 4 - 7 in detectX86FamilyModel()
490 *Family += (EAX >> 20) & 0xff; // Bits 20 - 27 in detectX86FamilyModel()
492 *Model += ((EAX >> 16) & 0xf) << 4; // Bits 16 - 19 in detectX86FamilyModel()
869 unsigned EAX, EBX; in getAvailableFeatures() local
904 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) && in getAvailableFeatures()
905 ((EAX & 0x6) == 0x6); in getAvailableFeatures()
906 bool HasAVX512Save = HasAVX && ((EAX & 0xe0) == 0xe0); in getAvailableFeatures()
912 MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX); in getAvailableFeatures()
[all …]
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| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/X86/ |
| D | intel-syntax.txt | 27 # CHECK: xchg EAX, R8D
39 # CHECK: add EAX, 0
51 # CHECK: adc EAX, 0
63 # CHECK: cmp EAX, 0
75 # CHECK: test EAX, 0
|