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Searched refs:EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/
Demif-common.c302 EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR, in dra7_ddr3_leveling()
303 EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR); in dra7_ddr3_leveling()
306 EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR, in dra7_ddr3_leveling()
307 EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR); in dra7_ddr3_leveling()
/external/u-boot/arch/arm/include/asm/
Demif.h523 #define EMIF_REG_PHY_FIFO_WE_IN_MISALINED_CLR (1 << 8) macro