Searched refs:EMIF_REG_ZQ_ZQCS_SHIFT (Results 1 – 2 of 2) sorted by relevance
179 #define EMIF_REG_ZQ_ZQCS_SHIFT 15 macro
755 tim3 |= val << EMIF_REG_ZQ_ZQCS_SHIFT; in get_sdram_tim_3_reg()