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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>
4  */
5 
6 #ifndef __FSP_CONFIGS_H__
7 #define __FSP_CONFIGS_H__
8 
9 #ifndef __ASSEMBLY__
10 struct fsp_config_data {
11 	struct fsp_cfg_common	common;
12 	struct upd_region	fsp_upd;
13 };
14 
15 struct fspinit_rtbuf {
16 	struct common_buf	common;	/* FSP common runtime data structure */
17 };
18 #endif
19 
20 /* FSP user configuration settings */
21 
22 #define MRC_INIT_TSEG_SIZE_1MB		1
23 #define MRC_INIT_TSEG_SIZE_2MB		2
24 #define MRC_INIT_TSEG_SIZE_4MB		4
25 #define MRC_INIT_TSEG_SIZE_8MB		8
26 
27 #define MRC_INIT_MMIO_SIZE_1024MB	0x400
28 #define MRC_INIT_MMIO_SIZE_1536MB	0x600
29 #define MRC_INIT_MMIO_SIZE_2048MB	0x800
30 
31 #define IGD_DVMT50_PRE_ALLOC_32MB	0x01
32 #define IGD_DVMT50_PRE_ALLOC_64MB	0x02
33 #define IGD_DVMT50_PRE_ALLOC_96MB	0x03
34 #define IGD_DVMT50_PRE_ALLOC_128MB	0x04
35 #define IGD_DVMT50_PRE_ALLOC_160MB	0x05
36 #define IGD_DVMT50_PRE_ALLOC_192MB	0x06
37 #define IGD_DVMT50_PRE_ALLOC_224MB	0x07
38 #define IGD_DVMT50_PRE_ALLOC_256MB	0x08
39 #define IGD_DVMT50_PRE_ALLOC_288MB	0x09
40 #define IGD_DVMT50_PRE_ALLOC_320MB	0x0a
41 #define IGD_DVMT50_PRE_ALLOC_352MB	0x0b
42 #define IGD_DVMT50_PRE_ALLOC_384MB	0x0c
43 #define IGD_DVMT50_PRE_ALLOC_416MB	0x0d
44 #define IGD_DVMT50_PRE_ALLOC_448MB	0x0e
45 #define IGD_DVMT50_PRE_ALLOC_480MB	0x0f
46 #define IGD_DVMT50_PRE_ALLOC_512MB	0x10
47 
48 #define APERTURE_SIZE_128MB		1
49 #define APERTURE_SIZE_256MB		2
50 #define APERTURE_SIZE_512MB		3
51 
52 #define GTT_SIZE_1MB			1
53 #define GTT_SIZE_2MB			2
54 
55 #define DRAM_TYPE_DDR3			0
56 #define DRAM_TYPE_LPDDR3		1
57 
58 #define SDCARD_MODE_DISABLED		0
59 #define SDCARD_MODE_PCI			1
60 #define SDCARD_MODE_ACPI		2
61 
62 #define LPE_MODE_DISABLED		0
63 #define LPE_MODE_PCI			1
64 #define LPE_MODE_ACPI			2
65 
66 #define CHV_SVID_CONFIG_0		0
67 #define CHV_SVID_CONFIG_1		1
68 #define CHV_SVID_CONFIG_2		2
69 #define CHV_SVID_CONFIG_3		3
70 
71 #define EMMC_MODE_DISABLED		0
72 #define EMMC_MODE_PCI			1
73 #define EMMC_MODE_ACPI			2
74 
75 #define SATA_SPEED_GEN1			1
76 #define SATA_SPEED_GEN2			2
77 #define SATA_SPEED_GEN3			3
78 
79 #define ISP_PCI_DEV_CONFIG_1		1
80 #define ISP_PCI_DEV_CONFIG_2		2
81 #define ISP_PCI_DEV_CONFIG_3		3
82 
83 #define PNP_SETTING_DISABLED		0
84 #define PNP_SETTING_POWER		1
85 #define PNP_SETTING_PERF		2
86 #define PNP_SETTING_POWER_AND_PERF	3
87 
88 #endif /* __FSP_CONFIGS_H__ */
89