Searched refs:EPSMCR0 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| D | fsl_epu.c | 80 {EPSMCR0 + EPSMCR_STRIDE * 0, 0},
81 {EPSMCR0 + EPSMCR_STRIDE * 1, 0},
82 {EPSMCR0 + EPSMCR_STRIDE * 2, 0x6C700000},
83 {EPSMCR0 + EPSMCR_STRIDE * 3, 0x2F000000},
84 {EPSMCR0 + EPSMCR_STRIDE * 4, 0x002F0000},
85 {EPSMCR0 + EPSMCR_STRIDE * 5, 0x00002E00},
86 {EPSMCR0 + EPSMCR_STRIDE * 6, 0x7C000000},
87 {EPSMCR0 + EPSMCR_STRIDE * 7, 0x30000000},
88 {EPSMCR0 + EPSMCR_STRIDE * 8, 0x64300000},
89 {EPSMCR0 + EPSMCR_STRIDE * 9, 0x00003000},
[all …]
|
| D | fsl_epu.h | 34 #define EPSMCR0 0x200 macro
|