Searched refs:ESUB_AXI_DIV_DEBUG_ADDR (Results 1 – 2 of 2) sorted by relevance
32 #define ESUB_AXI_DIV_DEBUG_ADDR (ESUB_CLK_BASE_ADDR + 0x00000E04) macro107 writel((readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()113 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()115 writel(readl(ESUB_AXI_DIV_DEBUG_ADDR) | in clk_eth_enable()117 ESUB_AXI_DIV_DEBUG_ADDR); in clk_eth_enable()124 if (!(readl(ESUB_AXI_DIV_DEBUG_ADDR) & in clk_eth_enable()