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Searched refs:EndReg (Results 1 – 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h461 unsigned& BeginReg, unsigned& EndReg) const { in getInRegsParamInfo() argument
467 EndReg = info.End; in getInRegsParamInfo()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DCallingConvLower.h472 unsigned& BeginReg, unsigned& EndReg) const { in getInRegsParamInfo() argument
478 EndReg = info.End; in getInRegsParamInfo()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp3781 int EndReg = tryParseRegister(); in parseRegisterList() local
3782 if (EndReg == -1) in parseRegisterList()
3785 if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg)) in parseRegisterList()
3786 EndReg = getDRegFromQReg(EndReg) + 1; in parseRegisterList()
3789 if (Reg == EndReg) in parseRegisterList()
3792 if (!RC->contains(EndReg)) in parseRegisterList()
3795 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList()
3799 while (Reg != EndReg) { in parseRegisterList()
4019 int EndReg = tryParseRegister(); in parseVectorList() local
4020 if (EndReg == -1) { in parseVectorList()
[all …]
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp3496 int EndReg = tryParseRegister(); in parseRegisterList() local
3497 if (EndReg == -1) in parseRegisterList()
3500 if (ARMMCRegisterClasses[ARM::QPRRegClassID].contains(EndReg)) in parseRegisterList()
3501 EndReg = getDRegFromQReg(EndReg) + 1; in parseRegisterList()
3504 if (Reg == EndReg) in parseRegisterList()
3507 if (!RC->contains(EndReg)) in parseRegisterList()
3510 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList()
3514 while (Reg != EndReg) { in parseRegisterList()
3734 int EndReg = tryParseRegister(); in parseVectorList() local
3735 if (EndReg == -1) { in parseVectorList()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp2215 int EndReg = tryParseRegister(); in parseRegisterList() local
2216 if (EndReg == -1) in parseRegisterList()
2220 if (Reg == EndReg) in parseRegisterList()
2223 if (!RC->contains(EndReg)) in parseRegisterList()
2226 if (getARMRegisterNumbering(Reg) > getARMRegisterNumbering(EndReg)) in parseRegisterList()
2230 while (Reg != EndReg) { in parseRegisterList()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp1166 #define REG_RANGE(BeginReg, EndReg, RegTable) \ in getRegAsmName() argument
1167 if (Reg >= BeginReg && Reg <= EndReg) { \ in getRegAsmName()