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Searched refs:EvenReg (Results 1 – 4 of 4) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1074 unsigned EvenReg = MI->getOperand(0).getReg(); in FixInvalidRegPairOp() local
1076 unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false); in FixInvalidRegPairOp()
1110 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1117 .addReg(EvenReg, in FixInvalidRegPairOp()
1134 (TRI->regsOverlap(EvenReg, BaseReg))) { in FixInvalidRegPairOp()
1142 EvenReg, EvenDeadKill, false, in FixInvalidRegPairOp()
1146 if (OddReg == EvenReg && EvenDeadKill) { in FixInvalidRegPairOp()
1154 EvenReg, EvenDeadKill, EvenUndef, in FixInvalidRegPairOp()
1424 unsigned &NewOpc, unsigned &EvenReg,
1504 unsigned &NewOpc, unsigned &EvenReg, in CanFormLdStDWord() argument
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DFPMover.cpp60 static void getDoubleRegPair(unsigned DoubleReg, unsigned &EvenReg, in getDoubleRegPair() argument
76 EvenReg = EvenHalvesOfPairs[i]; in getDoubleRegPair()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1623 unsigned EvenReg = MI->getOperand(0).getReg(); in FixInvalidRegPairOp() local
1625 unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false); in FixInvalidRegPairOp()
1630 bool Errata602117 = EvenReg == BaseReg && in FixInvalidRegPairOp()
1665 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1672 .addReg(EvenReg, in FixInvalidRegPairOp()
1690 if (isLd && TRI->regsOverlap(EvenReg, BaseReg)) { in FixInvalidRegPairOp()
1694 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
1697 if (OddReg == EvenReg && EvenDeadKill) { in FixInvalidRegPairOp()
1705 if (EvenReg == BaseReg) in FixInvalidRegPairOp()
1707 InsertLDR_STR(MBB, MBBI, OffImm, isLd, NewOpc, EvenReg, EvenDeadKill, in FixInvalidRegPairOp()
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/external/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp1581 unsigned EvenReg = MI->getOperand(0).getReg(); in FixInvalidRegPairOp() local
1583 unsigned EvenRegNum = TRI->getDwarfRegNum(EvenReg, false); in FixInvalidRegPairOp()
1588 bool Errata602117 = EvenReg == BaseReg && in FixInvalidRegPairOp()
1623 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1630 .addReg(EvenReg, in FixInvalidRegPairOp()
1651 (TRI->regsOverlap(EvenReg, BaseReg))) { in FixInvalidRegPairOp()
1658 EvenReg, EvenDeadKill, false, in FixInvalidRegPairOp()
1662 if (OddReg == EvenReg && EvenDeadKill) { in FixInvalidRegPairOp()
1670 if (EvenReg == BaseReg) in FixInvalidRegPairOp()
1673 EvenReg, EvenDeadKill, EvenUndef, in FixInvalidRegPairOp()
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