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Searched refs:ExtOp (Results 1 – 25 of 34) sorted by relevance

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/external/spirv-llvm/lib/SPIRV/
DOCLUtil.cpp164 unsigned ExtOp = ~0U; in getSPIRVInst() local
168 else if ((ExtOp = getExtOp(Info.MangledName, Info.UniqName)) != ~0U) in getSPIRVInst()
170 SPIRVEntry::create_unique(SPIRVEIS_OpenCL, ExtOp).get()); in getSPIRVInst()
DSPIRVWriter.cpp344 SPIRVWord *ExtOp, in isBuiltinTransToExtInst() argument
373 if (ExtOp) in isBuiltinTransToExtInst()
374 *ExtOp = EOC; in isBuiltinTransToExtInst()
1196 SPIRVWord ExtOp = SPIRVWORD_MAX; in transCallInst() local
1232 &ExtOp, &Dec)) in transCallInst()
1236 ExtOp, in transCallInst()
1237 transArguments(CI, BB, SPIRVEntry::create_unique(ExtSetKind, ExtOp).get()), in transCallInst()
DOCL20ToSPIRV.cpp958 unsigned ExtOp = ~0U; in transBuiltin() local
963 else if ((ExtOp = getExtOp(Info.MangledName, Info.UniqName)) != ~0U) in transBuiltin()
964 Info.UniqName = getSPIRVExtFuncName(SPIRVEIS_OpenCL, ExtOp); in transBuiltin()
DSPIRVUtil.cpp410 getSPIRVExtFuncName(SPIRVExtInstSetKind Set, unsigned ExtOp, in getSPIRVExtFuncName() argument
419 ExtOpName = getName(static_cast<OCLExtOpKind>(ExtOp)); in getSPIRVExtFuncName()
DSPIRVInternal.h601 std::string getSPIRVExtFuncName(SPIRVExtInstSetKind Set, unsigned ExtOp,
/external/spirv-llvm/lib/SPIRV/libSPIRV/
DSPIRVInstruction.h1201 ExtOp(TheEntryPoint) {
1210 ExtOp(TheEntryPoint) {
1216 :ExtSetId(SPIRVWORD_MAX), ExtOp(ExtOC), ExtSetKind(SetKind) {}
1218 void setExtOp(unsigned ExtOC) { ExtOp = ExtOC;}
1223 return ExtOp;
1238 getEncoder(O) << ExtOp;
1251 getDecoder(I) >> ExtOp;
1257 validateBuiltin(ExtSetId, ExtOp);
1262 auto EOC = static_cast<OCLExtOpKind>(ExtOp);
1279 SPIRVWord ExtOp;
DSPIRVEntry.cpp102 unsigned ExtOp) { in create_unique() argument
103 return std::unique_ptr<SPIRVExtInst>(new SPIRVExtInst(Set, ExtOp)); in create_unique()
DSPIRVEntry.h309 unsigned ExtOp);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp4392 unsigned ExtOp, TruncOp; in PromoteNode() local
4394 ExtOp = ISD::BITCAST; in PromoteNode()
4401 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
4405 ExtOp = ISD::SIGN_EXTEND; in PromoteNode()
4409 ExtOp = ISD::ZERO_EXTEND; in PromoteNode()
4415 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
4416 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
4425 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local
4427 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
4428 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrSSE.td4940 multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy, SDNode ExtOp> {
4943 def : Pat<(v16i16 (ExtOp (v16i8 VR128:$src))),
4947 def : Pat<(v8i32 (ExtOp (v16i8 VR128:$src))),
4949 def : Pat<(v4i64 (ExtOp (v16i8 VR128:$src))),
4952 def : Pat<(v8i32 (ExtOp (v8i16 VR128:$src))),
4954 def : Pat<(v4i64 (ExtOp (v8i16 VR128:$src))),
4957 def : Pat<(v4i64 (ExtOp (v4i32 VR128:$src))),
4983 def : Pat<(v16i16 (ExtOp (bc_v16i8 (loadv2i64 addr:$src)))),
4985 def : Pat<(v16i16 (ExtOp (v16i8 (vzmovl_v2i64 addr:$src)))),
4987 def : Pat<(v16i16 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
[all …]
DX86InstrAVX512.td9326 multiclass AVX512_pmovx_patterns<string OpcPrefix, SDNode ExtOp,
9393 def : Pat<(v16i16 (ExtOp (bc_v16i8 (loadv2i64 addr:$src)))),
9395 def : Pat<(v16i16 (ExtOp (v16i8 (vzmovl_v2i64 addr:$src)))),
9397 def : Pat<(v16i16 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
9401 def : Pat<(v8i32 (ExtOp (bc_v16i8 (v2i64 (scalar_to_vector (loadi64 addr:$src)))))),
9403 def : Pat<(v8i32 (ExtOp (v16i8 (vzmovl_v2i64 addr:$src)))),
9405 def : Pat<(v8i32 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
9407 def : Pat<(v8i32 (ExtOp (bc_v16i8 (loadv2i64 addr:$src)))),
9410 def : Pat<(v4i64 (ExtOp (bc_v16i8 (v4i32 (scalar_to_vector (loadi32 addr:$src)))))),
9412 def : Pat<(v4i64 (ExtOp (v16i8 (vzmovl_v4i32 addr:$src)))),
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp4095 unsigned ExtOp, TruncOp; in PromoteNode() local
4097 ExtOp = ISD::BITCAST; in PromoteNode()
4101 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
4105 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
4106 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
4113 unsigned ExtOp, TruncOp; in PromoteNode() local
4116 ExtOp = ISD::BITCAST; in PromoteNode()
4119 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
4122 ExtOp = ISD::FP_EXTEND; in PromoteNode()
4127 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
[all …]
/external/llvm/lib/Target/X86/
DX86InstrSSE.td5834 multiclass SS41I_pmovx_avx2_patterns<string OpcPrefix, string ExtTy, SDNode ExtOp> {
5837 def : Pat<(v16i16 (ExtOp (v16i8 VR128:$src))),
5841 def : Pat<(v8i32 (ExtOp (v16i8 VR128:$src))),
5843 def : Pat<(v4i64 (ExtOp (v16i8 VR128:$src))),
5846 def : Pat<(v8i32 (ExtOp (v8i16 VR128:$src))),
5848 def : Pat<(v4i64 (ExtOp (v8i16 VR128:$src))),
5851 def : Pat<(v4i64 (ExtOp (v4i32 VR128:$src))),
5877 def : Pat<(v16i16 (ExtOp (bc_v16i8 (loadv2i64 addr:$src)))),
5879 def : Pat<(v16i16 (ExtOp (v16i8 (vzmovl_v2i64 addr:$src)))),
5881 def : Pat<(v16i16 (ExtOp (v16i8 (vzload_v2i64 addr:$src)))),
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp3883 unsigned ExtOp, TruncOp; in PromoteNode() local
3885 ExtOp = ISD::BITCAST; in PromoteNode()
3889 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
3893 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
3894 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
3901 unsigned ExtOp, TruncOp; in PromoteNode() local
3903 ExtOp = ISD::BITCAST; in PromoteNode()
3906 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
3909 ExtOp = ISD::FP_EXTEND; in PromoteNode()
3914 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonConstExtenders.cpp1530 MachineOperand ExtOp(EV); in insertInitializer() local
1541 .add(ExtOp); in insertInitializer()
1547 .add(ExtOp); in insertInitializer()
1552 .add(ExtOp) in insertInitializer()
1558 .add(ExtOp); in insertInitializer()
1565 .add(ExtOp) in insertInitializer()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrNEON.td2209 ValueType TyQ, ValueType TyD, Intrinsic IntOp, SDNode ExtOp,
2215 (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
2298 ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
2303 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
2304 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
2311 ValueType TyQ, ValueType TyD, Intrinsic IntOp, SDNode ExtOp,
2316 [(set QPR:$Vd, (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
2355 SDNode OpNode, SDNode ExtOp, bit Commutable>
2360 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
2846 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUCodeGenPrepare.cpp384 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
385 Value *ExtRes = Builder.CreateCall(I32, { ExtOp }); in promoteUniformBitreverseToI32()
DSIISelLowering.cpp6990 unsigned ExtOp = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in performIntMed3ImmCombine() local
6992 SDValue Tmp1 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(0)); in performIntMed3ImmCombine()
6993 SDValue Tmp2 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(1)); in performIntMed3ImmCombine()
6994 SDValue Tmp3 = DAG.getNode(ExtOp, SL, NVT, Op1); in performIntMed3ImmCombine()
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td2916 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
2922 (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3006 ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
3011 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
3012 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3019 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
3024 [(set QPR:$Vd, (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3073 SDNode OpNode, SDNode ExtOp, bit Commutable>
3078 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3584 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMInstrNEON.td3007 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
3013 (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3097 ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
3102 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
3103 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3110 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
3115 [(set QPR:$Vd, (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3164 SDNode OpNode, SDNode ExtOp, bit Commutable>
3169 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3675 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
[all …]
/external/llvm/lib/Transforms/Scalar/
DIndVarSimplify.cpp1244 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
1245 DU.NarrowUse->replaceUsesOfWith(Op, ExtOp); in widenLoopCompare()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DIndVarSimplify.cpp1365 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
1366 DU.NarrowUse->replaceUsesOfWith(Op, ExtOp); in widenLoopCompare()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp2186 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local
2188 p = DAG.getExtLoad(ExtOp, dl, Ins[InsIdx].VT, Root, srcAddr, in LowerFormalArguments()
2312 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local
2315 ExtOp, dl, Ins[InsIdx].VT, Root, Arg, MachinePointerInfo(srcValue), in LowerFormalArguments()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp5763 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local
5764 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); in LowerCall_64SVR4()
6326 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
6327 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); in LowerCall_Darwin()
12011 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
12012 if (!ExtOp) in combineBVOfVecSExt()
12015 Index = ExtOp->getZExtValue(); in combineBVOfVecSExt()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.cpp3162 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
3163 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); in LowerCall_Darwin()

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