Searched refs:ExtSrc (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 253 unsigned ExtSrc = MRI.createVirtualRegister(DstRC); in selectCopy() local
256 .addDef(ExtSrc) in selectCopy()
261 I.getOperand(1).setReg(ExtSrc); in selectCopy()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1242 unsigned ExtSrc = MRI.createVirtualRegister(&AArch64::GPR64allRegClass); in select() local
1244 .addDef(ExtSrc) in select()
1248 I.getOperand(1).setReg(ExtSrc); in select()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCalls.cpp | 2135 Value *ExtSrc; in visitCallInst() local
2136 if (match(II->getArgOperand(0), m_OneUse(m_FPExt(m_Value(ExtSrc))))) { in visitCallInst()
2139 { ExtSrc }, II); in visitCallInst()
3573 Value *ExtSrc; in visitCallInst() local
3575 ((match(Src1, m_One()) && match(Src0, m_ZExt(m_Value(ExtSrc)))) || in visitCallInst()
3576 (match(Src1, m_AllOnes()) && match(Src0, m_SExt(m_Value(ExtSrc))))) && in visitCallInst()
3577 ExtSrc->getType()->isIntegerTy(1)) { in visitCallInst()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2592 SDValue ExtSrc = RHS.getOperand(0); in performOrCombine() local
2593 EVT SrcVT = ExtSrc.getValueType(); in performOrCombine()
2598 SDValue LowOr = DAG.getNode(ISD::OR, SL, MVT::i32, LowLHS, ExtSrc); in performOrCombine()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 6637 SDValue ExtSrc = RHS.getOperand(0); in performOrCombine() local
6638 EVT SrcVT = ExtSrc.getValueType(); in performOrCombine()
6643 SDValue LowOr = DAG.getNode(ISD::OR, SL, MVT::i32, LowLHS, ExtSrc); in performOrCombine()
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