/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 241 FCOPYSIGN, enumerator
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 254 FCOPYSIGN, enumerator
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D | BasicTTIImpl.h | 779 ISDs.push_back(ISD::FCOPYSIGN); in getIntrinsicInstrCost()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 288 FCOPYSIGN, enumerator
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D | BasicTTIImpl.h | 1050 ISDs.push_back(ISD::FCOPYSIGN);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break; in SoftenFloatResult() 802 case ISD::FCOPYSIGN: in CanSkipSoftenFloatOperand() 817 case ISD::FCOPYSIGN: in CanSkipSoftenFloatOperand() 1021 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult() 1507 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand() 1589 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN() 1746 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand() 1866 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
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D | LegalizeVectorTypes.cpp | 107 case ISD::FCOPYSIGN: in ScalarizeVectorResult() 601 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break; in SplitVectorResult() 924 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN() 925 Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHi.getValueType(), LHSHi, RHSHi); in SplitVecRes_FCOPYSIGN() 1468 case ISD::FCOPYSIGN: Res = SplitVecOp_FCOPYSIGN(N); break; in SplitVectorOperand() 2115 case ISD::FCOPYSIGN: in WidenVectorResult() 3088 case ISD::FCOPYSIGN: Res = WidenVecOp_FCOPYSIGN(N); break; in WidenVectorOperand()
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D | SelectionDAGDumper.cpp | 203 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
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D | LegalizeDAG.cpp | 1499 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS() 1501 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS() 3115 case ISD::FCOPYSIGN: in ExpandNode() 4205 case ISD::FCOPYSIGN: in PromoteNode() 4216 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
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D | LegalizeVectorOps.cpp | 307 case ISD::FCOPYSIGN: in LegalizeOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break; in SoftenFloatResult() 759 case ISD::FCOPYSIGN: Res = SoftenFloatOp_FCOPYSIGN(N); break; in SoftenFloatOperand() 808 case ISD::FCOPYSIGN: in CanSkipSoftenFloatOperand() 1075 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult() 1561 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break; in ExpandFloatOperand() 1643 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N), in ExpandFloatOp_FCOPYSIGN() 1763 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break; in PromoteFloatOperand() 1884 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break; in PromoteFloatResult()
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D | LegalizeVectorTypes.cpp | 111 case ISD::FCOPYSIGN: in ScalarizeVectorResult() 658 case ISD::FCOPYSIGN: SplitVecRes_FCOPYSIGN(N, Lo, Hi); break; in SplitVectorResult() 998 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN() 999 Hi = DAG.getNode(ISD::FCOPYSIGN, DL, LHSHi.getValueType(), LHSHi, RHSHi); in SplitVecRes_FCOPYSIGN() 1607 case ISD::FCOPYSIGN: Res = SplitVecOp_FCOPYSIGN(N); break; in SplitVectorOperand() 2323 case ISD::FCOPYSIGN: in WidenVectorResult() 3419 case ISD::FCOPYSIGN: Res = WidenVecOp_FCOPYSIGN(N); break; in WidenVectorOperand()
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D | SelectionDAGDumper.cpp | 242 case ISD::FCOPYSIGN: return "fcopysign"; in getOperationName()
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D | LegalizeDAG.cpp | 1519 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) { in ExpandFABS() 1521 return DAG.getNode(ISD::FCOPYSIGN, DL, FloatVT, Value, Zero); in ExpandFABS() 3222 case ISD::FCOPYSIGN: in ExpandNode() 4531 case ISD::FCOPYSIGN: in PromoteNode() 4542 const bool isTrunc = (Node->getOpcode() == ISD::FCOPYSIGN); in PromoteNode()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeISelLowering.cpp | 80 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in MBlazeTargetLowering() 81 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in MBlazeTargetLowering()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 285 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in AMDGPUTargetLowering() 286 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in AMDGPUTargetLowering() 430 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in AMDGPUTargetLowering() 1700 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src); in LowerFRINT() 1743 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f32, One, X); in LowerFROUND32() 1804 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X); in LowerFROUND64()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 1091 case ISD::FCOPYSIGN: return visitFCOPYSIGN(N); in visit() 5039 if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse() && in visitBITCAST() 5415 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, N0, N1); in visitFCOPYSIGN() 5435 N0.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN() 5436 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN() 5444 if (N1.getOpcode() == ISD::FCOPYSIGN) in visitFCOPYSIGN() 5445 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN() 5451 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFCOPYSIGN() 5555 if (N0.getOpcode() == ISD::FCOPYSIGN && N0.getNode()->hasOneUse()) { in visitFP_ROUND() 5559 return DAG.getNode(ISD::FCOPYSIGN, N->getDebugLoc(), VT, in visitFP_ROUND() [all …]
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D | LegalizeFloatTypes.cpp | 69 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break; in SoftenFloatResult() 852 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break; in ExpandFloatResult()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 770 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in SparcTargetLowering() 771 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in SparcTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsISelLowering.cpp | 168 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in MipsTargetLowering() 169 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in MipsTargetLowering() 676 case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); in LowerOperation()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 546 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Expand); in NVPTXTargetLowering() 547 setOperationAction(ISD::FCOPYSIGN, MVT::v2f16, Expand); in NVPTXTargetLowering() 548 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in NVPTXTargetLowering() 549 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in NVPTXTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 212 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering() 328 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in AArch64TargetLowering() 329 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in AArch64TargetLowering() 331 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Custom); in AArch64TargetLowering() 333 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering() 414 setOperationAction(ISD::FCOPYSIGN, MVT::v4f16, Expand); in AArch64TargetLowering() 424 setOperationAction(ISD::FCOPYSIGN, MVT::v8f16, Expand); in AArch64TargetLowering() 624 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand); in AArch64TargetLowering() 773 setOperationAction(ISD::FCOPYSIGN, VT, Custom); in addTypeForNEON() 2856 case ISD::FCOPYSIGN: in LowerOperation()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 145 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); in AArch64TargetLowering() 258 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); in AArch64TargetLowering() 259 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); in AArch64TargetLowering() 275 setOperationAction(ISD::FCOPYSIGN, MVT::f16, Promote); in AArch64TargetLowering() 317 setOperationAction(ISD::FCOPYSIGN, MVT::v4f16, Expand); in AArch64TargetLowering() 347 setOperationAction(ISD::FCOPYSIGN, MVT::v8f16, Expand); in AArch64TargetLowering() 526 setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand); in AArch64TargetLowering() 662 setOperationAction(ISD::FCOPYSIGN, VT, Custom); in addTypeForNEON() 2386 case ISD::FCOPYSIGN: in LowerOperation()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 470 setOperationAction(ISD::FCOPYSIGN, VT, Expand); in AMDGPUTargetLowering() 2050 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src); in LowerFRINT() 2098 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, VT, One, X); in LowerFROUND32_16() 2159 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X); in LowerFROUND64()
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D | R600ISelLowering.cpp | 233 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); in R600TargetLowering() 234 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); in R600TargetLowering()
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