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Searched refs:FCSEL (Results 1 – 19 of 19) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h44 FCSEL, // Conditional move instruction. enumerator
DAArch64SchedM1.td256 def : InstRW<[M1WriteNEONH], (instregex "^FCSEL[DS]rrr")>;
DAArch64SchedCyclone.td464 // FCSEL is a WriteF.
DAArch64SchedVulcan.td423 def : InstRW<[VulcanWrite_4Cyc_F01], (instregex "^FCSEL")>;
DAArch64ISelLowering.cpp843 case AArch64ISD::FCSEL: return "AArch64ISD::FCSEL"; in getTargetNodeName()
DAArch64InstrInfo.td2683 defm FCSEL : FPCondSelect<"fcsel">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h44 FCSEL, // Conditional move instruction. enumerator
DAArch64SchedCyclone.td466 // FCSEL is a WriteF.
DAArch64SchedExynosM1.td469 def : InstRW<[M1WriteNEONH], (instregex "^FCSEL[DS]rrr")>;
DAArch64SchedExynosM3.td534 def : InstRW<[M3WriteNEONH], (instregex "^FCSEL[DS]rrr")>;
DAArch64SchedFalkorDetails.td1119 def : InstRW<[FalkorWr_1VXVY_1cyc], (instregex "^FCSEL(S|D)rrr$")>;
DAArch64SchedThunderX2T99.td1189 def : InstRW<[THX2T99Write_4Cyc_F01], (instregex "^FCSEL")>;
DAArch64ISelLowering.cpp1094 case AArch64ISD::FCSEL: return "AArch64ISD::FCSEL"; in getTargetNodeName()
DAArch64InstrInfo.td2971 defm FCSEL : FPCondSelect<"fcsel">;
/external/v8/src/arm64/
Dconstants-arm64.h1129 FCSEL = FCSEL_s enumerator
Dassembler-arm64.cc3104 Emit(FPType(fd) | FCSEL | Rm(fm) | Cond(cond) | Rn(fn) | Rd(fd)); in fcsel()
/external/vixl/src/aarch64/
Dconstants-aarch64.h1311 FCSEL = FCSEL_s enumerator
Dassembler-aarch64.cc2835 Emit(FPType(vd) | FCSEL | Rm(vm) | Cond(cond) | Rn(vn) | Rd(vd)); in fcsel()
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md1807 ### FCSEL ### subsection