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Searched refs:FDIV_D (Results 1 – 16 of 16) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td97 def FDIV_D : FPALUD_rr_frm<0b0001101, "fdiv.d">;
98 def : FPALUDDynFrmAlias<FDIV_D, "fdiv.d">;
228 def : PatFpr64Fpr64DynFrm<fdiv, FDIV_D>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td463 def : InstRW<[P5600WriteFPUDivD], (instregex "^FDIV_D$")>;
DMipsMSAInstrInfo.td3029 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
/external/mesa3d/src/mesa/x86/
Dassyntax.h709 #define FDIV_D(a) CHOICE(fdivl a, fdivl a, fdivd a) macro
1422 #define FDIV_D(a) fdiv D_(a) macro
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc906 {DBGFIELD("FDIV_D") 1, false, false, 7, 2, 3, 1, 0, 0}, // #631
1926 {DBGFIELD("FDIV_D") 1, false, false, 60, 3, 5, 1, 0, 0}, // #631
DMipsGenMCCodeEmitter.inc1398 UINT64_C(2027946011), // FDIV_D
7275 case Mips::FDIV_D:
9124 Feature_HasStdEnc | Feature_HasMSA | 0, // FDIV_D = 1385
DMipsGenAsmWriter.inc2613 268455816U, // FDIV_D
5244 0U, // FDIV_D
DMipsGenFastISel.inc1547 return fastEmitInst_rr(Mips::FDIV_D, &Mips::MSA128DRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenInstrInfo.inc1400 FDIV_D = 1385,
3288 FDIV_D = 631,
5445 …5, 3, 1, 4, 631, 0, 0x6ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #1385 = FDIV_D
DMipsGenGlobalISel.inc14561 …4] } MSA128DOpnd:{ *:[v2f64] }:$ws, MSA128DOpnd:{ *:[v2f64] }:$wt) => (FDIV_D:{ *:[v2f64] } MSA1…
14562 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::FDIV_D,
DMipsGenDisassemblerTables.inc5147 /* 11884 */ MCD::OPC_Decode, 233, 10, 253, 1, // Opcode: FDIV_D
DMipsGenAsmMatcher.inc6220 …{ 4261 /* fdiv.d */, Mips::FDIV_D, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, Fea…
DMipsGenDAGISel.inc27999 /* 52617*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::FDIV_D), 0,
28002 … // Dst: (FDIV_D:{ *:[v2f64] } MSA128DOpnd:{ *:[v2f64] }:$ws, MSA128DOpnd:{ *:[v2f64] }:$wt)
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc714 33574331U, // FDIV_D
2428 0U, // FDIV_D
DMipsGenDisassemblerTables.inc2688 /* 9271 */ MCD_OPC_Decode, 185, 5, 117, // Opcode: FDIV_D
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3022 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;