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Searched refs:FEXUPR (Results 1 – 8 of 8) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.h819 FEXUPR = (9U << 17), enumerator
Ddisasm-mips.cc2656 case FEXUPR: in DecodeTypeMsa2RF()
Dsimulator-mips.cc6145 case FEXUPR: in Msa2RFInstrHelper2()
6185 if (opcode == FEXUPL || opcode == FEXUPR || opcode == FFQL || in DecodeTypeMsa2RF()
Dassembler-mips.cc3415 V(fexupr, FEXUPR) \
/external/v8/src/mips64/
Dconstants-mips64.h853 FEXUPR = (9U << 17), enumerator
Ddisasm-mips64.cc2970 case FEXUPR: in DecodeTypeMsa2RF()
Dsimulator-mips64.cc6376 case FEXUPR: in Msa2RFInstrHelper2()
6416 if (opcode == FEXUPL || opcode == FEXUPR || opcode == FFQL || in DecodeTypeMsa2RF()
Dassembler-mips64.cc3733 V(fexupr, FEXUPR) \