/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 306 X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0), 307 X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0), 1224 X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0), 1225 X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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D | X86ISelLowering.h | 245 FHADD, enumerator
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D | X86InstrFragmentsSIMD.td | 59 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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D | X86ISelLowering.cpp | 7826 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 7850 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 7904 X86Opcode = X86ISD::FHADD; in LowerToHorizontalOp() 16416 Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); in LowerUINT_TO_FP_i64() 25951 case X86ISD::FHADD: return "X86ISD::FHADD"; in getTargetNodeName() 30637 (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD || in combineTargetShuffle() 31138 if (HOp.getOpcode() != X86ISD::HADD && HOp.getOpcode() != X86ISD::FHADD && in foldShuffleOfHorizOp() 36472 auto NewOpcode = IsFadd ? X86ISD::FHADD : X86ISD::FHSUB; in combineFaddFsub()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 189 FHADD, enumerator
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D | X86InstrFragmentsSIMD.td | 53 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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D | X86GenFastISel.inc | 2521 // FastEmit functions for X86ISD::FHADD. 3687 case X86ISD::FHADD: return FastEmit_X86ISD_FHADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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D | X86ISelLowering.cpp | 9240 return DAG.getNode(X86ISD::FHADD, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN() 10668 case X86ISD::FHADD: return "X86ISD::FHADD"; in getTargetNodeName() 13958 return DAG.getNode(X86ISD::FHADD, N->getDebugLoc(), VT, LHS, RHS); in PerformFADDCombine()
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D | X86GenDAGISel.inc | 47038 /*SwitchOpcode*/ 111|128,1/*239*/, TARGET_VAL(X86ISD::FHADD),// ->98490
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 234 FHADD, enumerator
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D | X86IntrinsicsInfo.h | 253 X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0), 254 X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0), 1930 X86_INTRINSIC_DATA(sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0), 1931 X86_INTRINSIC_DATA(sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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D | X86InstrFragmentsSIMD.td | 65 def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
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D | X86ISelLowering.cpp | 6396 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 6420 return DAG.getNode(X86ISD::FHADD, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 6474 X86Opcode = X86ISD::FHADD; in LowerToHorizontalOp() 13505 Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); in LowerUINT_TO_FP_i64() 22133 case X86ISD::FHADD: return "X86ISD::FHADD"; in getTargetNodeName() 29565 auto NewOpcode = IsFadd ? X86ISD::FHADD : X86ISD::FHSUB; in combineFaddFsub()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenFastISel.inc | 8782 // FastEmit functions for X86ISD::FHADD. 11996 case X86ISD::FHADD: return fastEmit_X86ISD_FHADD_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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