Searched refs:FHSUB (Results 1 – 14 of 14) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86IntrinsicsInfo.h | 308 X86_INTRINSIC_DATA(avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 309 X86_INTRINSIC_DATA(avx_hsub_ps_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 1226 X86_INTRINSIC_DATA(sse3_hsub_pd, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 1227 X86_INTRINSIC_DATA(sse3_hsub_ps, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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D | X86ISelLowering.h | 246 FHSUB, enumerator
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D | X86InstrFragmentsSIMD.td | 60 def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
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D | X86ISelLowering.cpp | 7829 return DAG.getNode(X86ISD::FHSUB, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 7856 return DAG.getNode(X86ISD::FHSUB, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 7906 X86Opcode = X86ISD::FHSUB; in LowerToHorizontalOp() 25952 case X86ISD::FHSUB: return "X86ISD::FHSUB"; in getTargetNodeName() 30638 Opcode0 == X86ISD::FHSUB || Opcode0 == X86ISD::HSUB || in combineTargetShuffle() 31139 HOp.getOpcode() != X86ISD::HSUB && HOp.getOpcode() != X86ISD::FHSUB) in foldShuffleOfHorizOp() 36472 auto NewOpcode = IsFadd ? X86ISD::FHADD : X86ISD::FHSUB; in combineFaddFsub()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 192 FHSUB, enumerator
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D | X86InstrFragmentsSIMD.td | 54 def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
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D | X86GenFastISel.inc | 2575 // FastEmit functions for X86ISD::FHSUB. 3688 case X86ISD::FHSUB: return FastEmit_X86ISD_FHSUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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D | X86ISelLowering.cpp | 9246 return DAG.getNode(X86ISD::FHSUB, dl, Op.getValueType(), in LowerINTRINSIC_WO_CHAIN() 10669 case X86ISD::FHSUB: return "X86ISD::FHSUB"; in getTargetNodeName() 13973 return DAG.getNode(X86ISD::FHSUB, N->getDebugLoc(), VT, LHS, RHS); in PerformFSUBCombine()
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D | X86GenDAGISel.inc | 47148 /*SwitchOpcode*/ 111|128,1/*239*/, TARGET_VAL(X86ISD::FHSUB),// ->98733
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 235 FHSUB, enumerator
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D | X86IntrinsicsInfo.h | 255 X86_INTRINSIC_DATA(avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 256 X86_INTRINSIC_DATA(avx_hsub_ps_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 1932 X86_INTRINSIC_DATA(sse3_hsub_pd, INTR_TYPE_2OP, X86ISD::FHSUB, 0), 1933 X86_INTRINSIC_DATA(sse3_hsub_ps, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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D | X86InstrFragmentsSIMD.td | 66 def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
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D | X86ISelLowering.cpp | 6399 return DAG.getNode(X86ISD::FHSUB, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 6426 return DAG.getNode(X86ISD::FHSUB, DL, VT, InVec0, InVec1); in LowerToHorizontalOp() 6476 X86Opcode = X86ISD::FHSUB; in LowerToHorizontalOp() 22134 case X86ISD::FHSUB: return "X86ISD::FHSUB"; in getTargetNodeName() 29565 auto NewOpcode = IsFadd ? X86ISD::FHADD : X86ISD::FHSUB; in combineFaddFsub()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenFastISel.inc | 8836 // FastEmit functions for X86ISD::FHSUB. 11997 case X86ISD::FHSUB: return fastEmit_X86ISD_FHSUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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