Searched refs:FIELD_PREP (Results 1 – 6 of 6) sorted by relevance
/external/u-boot/drivers/adc/ |
D | meson-saradc.c | 366 regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_MAX_INDEX_MASK, 0); in meson_saradc_enable_channel() 371 regval = FIELD_PREP(MESON_SAR_ADC_CHAN_LIST_ENTRY_MASK(0), channel); in meson_saradc_enable_channel() 375 regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_DETECT_MUX_MASK, in meson_saradc_enable_channel() 381 regval = FIELD_PREP(MESON_SAR_ADC_DETECT_IDLE_SW_IDLE_MUX_SEL_MASK, in meson_saradc_enable_channel() 450 regval = FIELD_PREP(MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, sel); in meson_saradc_set_chan7_mux() 535 FIELD_PREP(MESON_SAR_ADC_DELAY_SAMPLE_DLY_CNT_MASK, in meson_saradc_init() 539 FIELD_PREP(MESON_SAR_ADC_DELAY_SAMPLE_DLY_SEL_MASK, in meson_saradc_init() 545 FIELD_PREP(MESON_SAR_ADC_DELAY_INPUT_DLY_CNT_MASK, in meson_saradc_init() 549 FIELD_PREP(MESON_SAR_ADC_DELAY_INPUT_DLY_SEL_MASK, in meson_saradc_init() 556 regval = FIELD_PREP(MESON_SAR_ADC_CHAN_10_SW_CHAN0_MUX_SEL_MASK, 0); in meson_saradc_init() [all …]
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/external/u-boot/arch/arm/mach-uniphier/clk/ |
D | pll-base-ld20.c | 44 tmp |= FIELD_PREP(SC_PLLCTRL_SSC_DK_MASK, in uniphier_ld20_sscpll_init() 51 tmp |= FIELD_PREP(SC_PLLCTRL2_SSC_JK_MASK, in uniphier_ld20_sscpll_init() 97 tmp |= FIELD_PREP(SC_PLLCTRL3_REGI_MASK, regi); in uniphier_ld20_sscpll_set_regi()
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/external/u-boot/drivers/mmc/ |
D | sdhci-cadence.c | 93 tmp = FIELD_PREP(SDHCI_CDNS_HRS04_WDATA, data) | in sdhci_cdns_write_phy_reg() 94 FIELD_PREP(SDHCI_CDNS_HRS04_ADDR, addr); in sdhci_cdns_write_phy_reg() 160 tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_MODE, mode); in sdhci_cdns_set_control_reg() 179 tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_TUNE, val); in sdhci_cdns_set_tune_val()
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/external/u-boot/drivers/mtd/nand/ |
D | denali.c | 969 tmp |= FIELD_PREP(ACC_CLKS__VALUE, acc_clks); in denali_setup_data_interface() 978 tmp |= FIELD_PREP(RE_2_WE__VALUE, re_2_we); in denali_setup_data_interface() 987 tmp |= FIELD_PREP(RE_2_RE__VALUE, re_2_re); in denali_setup_data_interface() 1002 tmp |= FIELD_PREP(TWHR2_AND_WE_2_RE__WE_2_RE, we_2_re); in denali_setup_data_interface() 1017 tmp |= FIELD_PREP(TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA, addr_2_data); in denali_setup_data_interface() 1027 tmp |= FIELD_PREP(RDWR_EN_HI_CNT__VALUE, rdwr_en_hi); in denali_setup_data_interface() 1041 tmp |= FIELD_PREP(RDWR_EN_LO_CNT__VALUE, rdwr_en_lo); in denali_setup_data_interface() 1052 tmp |= FIELD_PREP(CS_SETUP_CNT__VALUE, cs_setup); in denali_setup_data_interface() 1300 iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) | in denali_init() 1301 FIELD_PREP(ECC_CORRECTION__VALUE, chip->ecc.strength), in denali_init()
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/external/u-boot/drivers/phy/ |
D | meson-gxl-usb3.c | 121 val |= FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff); in phy_meson_gxl_usb3_power_on() 149 val |= FIELD_PREP(USB_R1_U3H_FLADJ_30MHZ_REG_MASK, 0x20); in phy_meson_gxl_usb3_init()
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/external/u-boot/include/linux/ |
D | bitfield.h | 86 #define FIELD_PREP(_mask, _val) \ macro
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