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Searched refs:FIRST_TARGET_MEMORY_OPCODE (Results 1 – 25 of 30) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISD.def25 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISD.def25 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h641 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+150; variable
DSelectionDAGNodes.h368 return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h777 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+300; variable
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h838 static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END+400; variable
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h305 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h61 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelLowering.h176 STD_32 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.h62 LoadV2 = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h297 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.h191 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h465 FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h301 ATOMIC_SWAPW = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/Mips/
DMipsISelLowering.h202 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h195 LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/ARM/
DARMISelLowering.h193 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h318 ATOMADD64_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h346 STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.h195 LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h248 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelLowering.h237 VLD1DUP = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/llvm/lib/Target/X86/
DX86ISelLowering.h543 LCMPXCHG_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.h393 STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.h583 LCMPXCHG_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,

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