/external/v8/src/compiler/mips64/ |
D | instruction-scheduler-mips64.cc | 393 FLOOR_W_S = 4, enumerator 1514 return Latency::FLOOR_W_S + Latency::MFC1; in GetInstructionLatency()
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/external/v8/src/compiler/mips/ |
D | instruction-scheduler-mips.cc | 360 FLOOR_W_S = 4, enumerator 1707 return Latency::FLOOR_W_S; in GetInstructionLatency()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
D | valid.s | 71 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
D | valid.s | 132 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
D | valid.s | 110 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 117 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 116 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/v8/src/mips/ |
D | constants-mips.h | 615 FLOOR_W_S = ((1U << 3) + 7), enumerator
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D | assembler-mips.cc | 2925 GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_W_S); in floor_w_s()
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D | simulator-mips.cc | 3431 case FLOOR_W_S: // Round double to word towards negative infinity. in DecodeTypeRegisterSRsType()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 116 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 184 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
D | valid.s | 171 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 185 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/v8/src/mips64/ |
D | constants-mips64.h | 646 FLOOR_W_S = ((1U << 3) + 7), enumerator
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D | assembler-mips64.cc | 3316 GenInstrRegister(COP1, S, f0, fs, fd, FLOOR_W_S); in floor_w_s()
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D | simulator-mips64.cc | 2891 case FLOOR_W_S: // Round double to word towards negative infinity. in DecodeTypeRegisterSRsType()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
D | valid.s | 164 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
D | valid.s | 164 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 190 … # CHECK: # <MCInst #{{.*}} FLOOR_W_S
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrFPU.td | 277 def FLOOR_W_S : MMRel, StdMMR6Rel, ABSS_FT<"floor.w.s", FGR32Opnd, FGR32Opnd, II_FLOOR>,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrFPU.td | 364 def FLOOR_W_S : MMRel, StdMMR6Rel, ABSS_FT<"floor.w.s", FGR32Opnd, FGR32Opnd, II_FLOOR>,
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 752 23083U, // FLOOR_W_S 2466 0U, // FLOOR_W_S
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 1437 UINT64_C(1174405135), // FLOOR_W_S 3169 case Mips::FLOOR_W_S: 9163 …tdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FLOOR_W_S = 1424
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D | MipsGenInstrInfo.inc | 1439 FLOOR_W_S = 1424, 5484 …, 1, 4, 688, 0, 0x4ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #1424 = FLOOR_W_S 10131 { Mips::FLOOR_W_S, Mips::FLOOR_W_S, Mips::FLOOR_W_S_MM }, 10331 { Mips::FLOOR_W_S, Mips::FLOOR_W_S, Mips::FLOOR_W_S_MMR6 },
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