| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 248 FMAD, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 282 FMAD, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 201 case ISD::FMAD: return "fmad"; in getOperationName()
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| D | DAGCombiner.cpp | 7772 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFADDForFMACombine()
7789 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFADDForFMACombine()
7960 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFSUBForFMACombine()
7976 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFSUBForFMACombine()
8230 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFMULForFMACombine()
8242 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFMULForFMACombine()
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| D | LegalizeFloatTypes.cpp | 1899 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break; in PromoteFloatResult()
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| D | LegalizeDAG.cpp | 3165 case ISD::FMAD: in ExpandNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 550 case ISD::FMAD: in fnegFoldsIntoOp()
1510 (unsigned)ISD::FMAD; in LowerDIVREM24()
1590 unsigned FMAD = Subtarget->hasFP32Denormals() ? in LowerUDIVREM64() local
1592 (unsigned)ISD::FMAD; in LowerUDIVREM64()
1596 SDValue Mad1 = DAG.getNode(FMAD, DL, MVT::f32, Cvt_Hi, in LowerUDIVREM64()
1605 SDValue Mad2 = DAG.getNode(FMAD, DL, MVT::f32, Trunc, in LowerUDIVREM64()
3541 case ISD::FMAD: { in performFNegCombine()
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| D | SIISelLowering.cpp | 347 setOperationAction(ISD::FMAD, MVT::f32, Legal); in SITargetLowering()
475 setOperationAction(ISD::FMAD, MVT::f16, Legal); in SITargetLowering()
685 return ((Opcode == ISD::FMAD && Subtarget->hasMadMixInsts()) || in isFPExtFoldable()
6694 case ISD::FMAD: in fp16SrcZerosHighBits()
6824 case ISD::FMAD: in isCanonicalized()
7327 return ISD::FMAD; in getFusedOpcode()
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| D | AMDGPUISelDAGToDAG.cpp | 637 case ISD::FMAD: in Select()
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| D | R600ISelLowering.cpp | 229 setOperationAction(ISD::FMAD, MVT::f32, Legal); in R600TargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 239 case ISD::FMAD: return "fmad"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 1918 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break; in PromoteFloatResult()
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| D | DAGCombiner.cpp | 10125 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFADDForFMACombine()
10149 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFADDForFMACombine()
10336 bool HasFMAD = (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFSUBForFMACombine()
10361 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFSUBForFMACombine()
10644 (LegalOperations && TLI.isOperationLegal(ISD::FMAD, VT)); in visitFMULForFMADistributiveCombine()
10651 unsigned PreferredFusedOpcode = HasFMAD ? ISD::FMAD : ISD::FMA; in visitFMULForFMADistributiveCombine()
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| D | LegalizeDAG.cpp | 3272 case ISD::FMAD: in ExpandNode()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2946 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, RHS); in PerformDAGCombine()
2955 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, LHS); in PerformDAGCombine()
2984 return DAG.getNode(ISD::FMAD, DL, VT, Two, A, NegRHS); in PerformDAGCombine()
2994 return DAG.getNode(ISD::FMAD, DL, VT, NegTwo, A, LHS); in PerformDAGCombine()
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| D | AMDGPUISelLowering.cpp | 260 setOperationAction(ISD::FMAD, MVT::f32, Legal); in AMDGPUTargetLowering()
1293 SDValue fr = DAG.getNode(ISD::FMAD, DL, FltVT, fqneg, fb, fa); in LowerDIVREM24()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 604 setOperationAction(ISD::FMAD, VT, Expand); in initActions()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 872 setOperationAction(ISD::FMAD, VT, Expand); in initActions()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 431 def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 413 def fmad : SDNode<"ISD::FMAD" , SDTFPTernaryOp>;
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXInstrInfo.td | 503 defm FMAD : PTX_FLOAT_4OP<"mad">, Requires<[SupportsFMA]>;
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