| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1509 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
1510 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
1511 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_pd_512, FMA_OP_MASK, X86ISD::FNMADD,
1513 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_128, FMA_OP_MASK, X86ISD::FNMADD, 0),
1514 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_256, FMA_OP_MASK, X86ISD::FNMADD, 0),
1515 X86_INTRINSIC_DATA(avx512_mask_vfnmadd_ps_512, FMA_OP_MASK, X86ISD::FNMADD,
1854 X86_INTRINSIC_DATA(fma_vfnmadd_pd, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1855 X86_INTRINSIC_DATA(fma_vfnmadd_pd_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1856 X86_INTRINSIC_DATA(fma_vfnmadd_ps, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
1857 X86_INTRINSIC_DATA(fma_vfnmadd_ps_256, INTR_TYPE_3OP, X86ISD::FNMADD, 0),
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| D | X86ISelLowering.h | 475 FNMADD, enumerator
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| D | X86InstrFragmentsSIMD.td | 470 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
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| D | X86ISelLowering.cpp | 22286 case X86ISD::FNMADD: return "X86ISD::FNMADD"; in getTargetNodeName()
29763 return DAG.getNode(X86ISD::FNMADD, DL, VT, Arg.getOperand(0), in combineFneg()
29765 case X86ISD::FNMADD: in combineFneg()
30231 Opcode = (!NegC) ? X86ISD::FNMADD : X86ISD::FNMSUB; in combineFMA()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 488 FNMADD, enumerator
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| D | X86InstrFragmentsSIMD.td | 471 def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFPTernaryOp, [SDNPCommutative]>;
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| D | X86ISelLowering.cpp | 26110 case X86ISD::FNMADD: return "X86ISD::FNMADD"; in getTargetNodeName()
37013 case X86ISD::FMSUB: NewOpcode = X86ISD::FNMADD; break; in combineFneg()
37014 case X86ISD::FNMADD: NewOpcode = X86ISD::FMSUB; break; in combineFneg()
37877 case ISD::FMA: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
37881 case X86ISD::FNMADD: Opcode = ISD::FMA; break; in negateFMAOpcode()
37895 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
37897 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
39731 case X86ISD::FNMADD: in PerformDAGCombine()
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| /external/v8/src/ppc/ |
| D | constants-ppc.h | 1858 V(fnmadd, FNMADD, 0xFC00003E) \
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | P9InstrResources.td | 423 FNMADD,
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| D | PPCInstrInfo.td | 2829 defm FNMADD : AForm_1r<63, 31,
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| /external/v8/src/arm64/ |
| D | disasm-arm64.cc | 1086 FORMAT(FNMADD, "fnmadd"); in VisitFPDataProcessing3Source()
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| /external/vixl/src/aarch64/ |
| D | disasm-aarch64.cc | 1752 FORMAT(FNMADD, "fnmadd"); in VisitFPDataProcessing3Source()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedThunderX2T99.td | 1182 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
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| D | AArch64InstrInfo.td | 2923 defm FNMADD : ThreeOperandFPData<1, 0, "fnmadd",
2939 // We handled -(a + b*c) for FNMADD above, now it's time for "(-a) + (-b)*c" and
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 1249 def FNMADD : AForm_1<63, 31,
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| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 544 18704U, // FNMADD
1817 40U, // FNMADD
4016 // FMADD, FMADDS, FMADDSo, FMADDo, FMSUB, FMSUBS, FMSUBSo, FMSUBo, FNMADD...
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| D | PPCGenDisassemblerTables.inc | 2231 /* 9360 */ MCD_OPC_Decode, 140, 4, 112, // Opcode: FNMADD
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2269 ### FNMADD ### subsection
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2635 defm FNMADD : ThreeOperandFPData<1, 0, "fnmadd",
2651 // We handled -(a + b*c) for FNMADD above, now it's time for "(-a) + (-b)*c" and
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2549 defm FNMADD : AForm_1r<63, 31,
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| /external/capstone/arch/AArch64/ |
| D | AArch64GenAsmWriter.inc | 6416 // EXTRWrri, EXTRXrri, FMADDDrrr, FMADDSrrr, FMSUBDrrr, FMSUBSrrr, FNMADD...
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