/external/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 2 ; RUN: FileCheck %s < %t --check-prefix=NO-FP16 3 …6 -show-encoding -output-asm-variant=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 14 ; FP16: fabs h1, h2 ; encoding: [0x41,0xc0,0xe0,0x1e] 15 ; NO-FP16: error: instruction requires: 16 ; NO-FP16-NEXT: fabs h1, h2 24 ; FP16: fadd h1, h2, h3 ; encoding: [0x41,0x28,0xe3,0x1e] 25 ; NO-FP16: error: instruction requires: 26 ; NO-FP16-NEXT: fadd h1, h2, h3 34 ; FP16: fdiv h1, h2, h3 ; encoding: [0x41,0x18,0xe3,0x1e] 35 ; NO-FP16: error: instruction requires: [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-fp-encoding.s | 2 ; RUN: FileCheck %s < %t --check-prefix=NO-FP16 3 …6 -show-encoding -output-asm-variant=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 14 ; FP16: fabs h1, h2 ; encoding: [0x41,0xc0,0xe0,0x1e] 15 ; NO-FP16: error: instruction requires: 16 ; NO-FP16-NEXT: fabs h1, h2 24 ; FP16: fadd h1, h2, h3 ; encoding: [0x41,0x28,0xe3,0x1e] 25 ; NO-FP16: error: instruction requires: 26 ; NO-FP16-NEXT: fadd h1, h2, h3 34 ; FP16: fdiv h1, h2, h3 ; encoding: [0x41,0x18,0xe3,0x1e] 35 ; NO-FP16: error: instruction requires: [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | fp16-v4-instructions.ll | 2 …le=aarch64-none-eabi -mattr=+fullfp16 | FileCheck %s --check-prefix=CHECK-FP16 --check-prefix=CHEC… 12 ; CHECK-FP16-LABEL: add_h: 13 ; CHECK-FP16: fadd v0.4h, v0.4h, v1.4h 14 ; CHECK-FP16-NEXT: ret 37 ; CHECK-FP16-LABEL: sub_h: 38 ; CHECK-FP16: fsub v0.4h, v0.4h, v1.4h 39 ; CHECK-FP16-NEXT: ret 53 ; CHECK-FP16-LABEL: mul_h: 54 ; CHECK-FP16: fmul v0.4h, v0.4h, v1.4h 55 ; CHECK-FP16-NEXT: ret [all …]
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D | fp16-v8-instructions.ll | 2 …ullfp16 | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-FP16 --check-prefix=CHE… 40 ; CHECK-FP16-LABEL: add_h: 41 ; CHECK-FP16: fadd v0.8h, v0.8h, v1.8h 42 ; CHECK-FP16-NEXT: ret 85 ; CHECK-FP16-LABEL: sub_h: 86 ; CHECK-FP16: fsub v0.8h, v0.8h, v1.8h 87 ; CHECK-FP16-NEXT: ret 130 ; CHECK-FP16-LABEL: mul_h: 131 ; CHECK-FP16: fmul v0.8h, v0.8h, v1.8h 132 ; CHECK-FP16-NEXT: ret [all …]
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D | f16-instructions.ll | 2 …sable-post-ra -disable-fp-elim | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-FP16 13 ; CHECK-FP16-LABEL: test_fadd: 14 ; CHECK-FP16-NEXT: fadd h0, h0, h1 15 ; CHECK-FP16-NEXT: ret 29 ; CHECK-FP16-LABEL: test_fsub: 30 ; CHECK-FP16-NEXT: fsub h0, h0, h1 31 ; CHECK-FP16-NEXT: ret 45 ; CHECK-FP16-LABEL: test_fmul: 46 ; CHECK-FP16-NEXT: fmul h0, h0, h1 47 ; CHECK-FP16-NEXT: ret [all …]
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D | arm64-vfloatintrinsics.ll | 2 …ple=arm64-eabi -aarch64-neon-syntax=apple -mattr=+fullfp16 | FileCheck %s --check-prefix=CHECK-FP16 23 ; CHECK-FP16-LABEL: test_v4f16.sqrt: 24 ; CHECK-FP16-NOT: fcvt 25 ; CHECK-FP16: fsqrt.4h 26 ; CHECK-FP16-NEXT: ret 33 ; CHECK-FP16-LABEL: test_v8f16.sqrt: 34 ; CHECK-FP16-NOT: fcvt 35 ; CHECK-FP16: fsqrt.8h 36 ; CHECK-FP16-NEXT: ret 107 ; CHECK-FP16-LABEL: test_v4f16.fma: [all …]
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/external/llvm/test/CodeGen/ARM/ |
D | fp16-promote.ll | 1 ; RUN: llc -asm-verbose=false < %s -mattr=+vfp3,+fp16 | FileCheck %s -check-prefix=CHECK-FP16 --ch… 9 ; CHECK-FP16: vcvtb.f32.f16 10 ; CHECK-FP16: vcvtb.f32.f16 15 ; CHECK-FP16: vcvtb.f16.f32 26 ; CHECK-FP16: vcvtb.f32.f16 27 ; CHECK-FP16: vcvtb.f32.f16 32 ; CHECK-FP16: vcvtb.f16.f32 43 ; CHECK-FP16: vcvtb.f32.f16 44 ; CHECK-FP16: vcvtb.f32.f16 49 ; CHECK-FP16: vcvtb.f16.f32 [all …]
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D | fp16.ll | 12 ; RUN: FileCheck --check-prefix=CHECK --check-prefix=CHECK-FP16 --check-prefix=CHECK-FP16-SAFE %s 14 ; RUN: FileCheck --check-prefix=CHECK --check-prefix=CHECK-FP16 --check-prefix=CHECK-FP16-UNSAFE … 31 ; CHECK-FP16: vcvtb.f32.f16 38 ; CHECK-FP16: vcvtb.f32.f16 46 ; CHECK-FP16: vcvtb.f16.f32 65 ; CHECK-FP16: vmov [[TMP16:s[0-9]+]], r0 66 ; CHECK-FP16: vcvtb.f32.f16 [[TMP32:s[0-9]+]], [[TMP16]] 67 ; CHECK-FP16: vcvt.f64.f32 d0, [[TMP32]] 87 ; CHECK-FP16-SAFE: bl __aeabi_d2h 89 ; CHECK-FP16-UNSAFE: vcvt.f32.f64 s0, d0 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | fp16-promote.ll | 1 …p3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16 --check-prefix=CHE… 9 ; CHECK-FP16: vcvtb.f32.f16 10 ; CHECK-FP16: vcvtb.f32.f16 15 ; CHECK-FP16: vcvtb.f16.f32 26 ; CHECK-FP16: vcvtb.f32.f16 27 ; CHECK-FP16: vcvtb.f32.f16 32 ; CHECK-FP16: vcvtb.f16.f32 43 ; CHECK-FP16: vcvtb.f32.f16 44 ; CHECK-FP16: vcvtb.f32.f16 49 ; CHECK-FP16: vcvtb.f16.f32 [all …]
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D | fp16-instructions.ll | 7 …i -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-SOFTFP-FP16,CHECK-SOFTFP-FP16-A32 11 …i -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-SOFTFP-FP16,CHECK-SOFTFP-FP16-T32 20 … -mtriple=arm-none-eabihf -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FP16 24 …riple=thumbv7-none-eabihf -mattr=+vfp4 | FileCheck %s --check-prefixes=CHECK,CHECK-HARDFP-FP16 75 ; CHECK-SOFTFP-FP16: vmov [[S2:s[0-9]]], r1 76 ; CHECK-SOFTFP-FP16: vmov [[S0:s[0-9]]], r0 77 ; CHECK-SOFTFP-FP16: vcvtb.f32.f16 [[S2]], [[S2]] 78 ; CHECK-SOFTFP-FP16: vcvtb.f32.f16 [[S0]], [[S0]] 79 ; CHECK-SOFTFP-FP16: vadd.f32 [[S0]], [[S0]], [[S2]] 80 ; CHECK-SOFTFP-FP16: vcvtb.f16.f32 [[S0]], [[S0]] [all …]
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D | fp16.ll | 12 ; RUN: FileCheck --check-prefix=CHECK --check-prefix=CHECK-FP16 --check-prefix=CHECK-FP16-SAFE %s 14 ; RUN: FileCheck --check-prefix=CHECK --check-prefix=CHECK-FP16 --check-prefix=CHECK-FP16-UNSAFE … 31 ; CHECK-FP16: vcvtb.f32.f16 38 ; CHECK-FP16: vcvtb.f32.f16 46 ; CHECK-FP16: vcvtb.f16.f32 65 ; CHECK-FP16: vmov [[TMP16:s[0-9]+]], r0 66 ; CHECK-FP16: vcvtb.f32.f16 [[TMP32:s[0-9]+]], [[TMP16]] 67 ; CHECK-FP16: vcvt.f64.f32 d0, [[TMP32]] 87 ; CHECK-FP16-SAFE: bl __aeabi_d2h 89 ; CHECK-FP16-UNSAFE: vcvt.f32.f64 s0, d0 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | neon-complex-thumb.txt | 1 …neon,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP16 2 …,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16 3 …,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16 5 # RUN: FileCheck %s < %t --check-prefix=MISSING-FP16 8 # CHECK-FP16: vcmla.f16 d0, d1, d2, #0 9 # MISSING-FP16: warning: invalid instruction encoding 11 # CHECK-FP16: vcmla.f16 q0, q1, q2, #0 12 # MISSING-FP16: warning: invalid instruction encoding 29 # CHECK-FP16: vcadd.f16 d0, d1, d2, #90 30 # MISSING-FP16: warning: invalid instruction encoding [all …]
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D | neon-complex-arm.txt | 1 …neon,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP16 2 …,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16 3 …,+fullfp16 -disassemble < %s 2>&1 | FileCheck %s --check-prefix=MISSING --check-prefix=MISSING-FP16 5 # RUN: FileCheck %s < %t --check-prefix=MISSING-FP16 8 # CHECK-FP16: vcmla.f16 d0, d1, d2, #0 9 # MISSING-FP16: warning: invalid instruction encoding 11 # CHECK-FP16: vcmla.f16 q0, q1, q2, #0 12 # MISSING-FP16: warning: invalid instruction encoding 29 # CHECK-FP16: vcadd.f16 d0, d1, d2, #90 30 # MISSING-FP16: warning: invalid instruction encoding [all …]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 2 …16 --disassemble -output-asm-variant=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 12 # FP16: fabs h1, h2 20 # FP16: fadd h1, h2, h3 28 # FP16: fdiv h1, h2, h3 36 # FP16: fmadd h1, h2, h3, h4 47 # FP16: fmax h1, h2, h3 50 # FP16: fmaxnm h1, h2, h3 61 # FP16: fmin h1, h2, h3 64 # FP16: fminnm h1, h2, h3 72 # FP16: fmsub h1, h2, h3, h4 [all …]
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D | basic-a64-instructions.txt | 3 …mattr=+fp-armv8,+fullfp16 -disassemble < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 1520 # FP16: fcvtzs w3, h5, #1 1521 # FP16: fcvtzs wzr, h20, #13 1522 # FP16: fcvtzs w19, h0, #32 1527 # FP16: fcvtzs x3, h5, #1 1528 # FP16: fcvtzs x12, h30, #45 1529 # FP16: fcvtzs x19, h0, #64 1562 # FP16: fcvtzu w3, h5, #1 1563 # FP16: fcvtzu wzr, h20, #13 1564 # FP16: fcvtzu w19, h0, #32 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-scalar-fp.txt | 2 …16 --disassemble -output-asm-variant=1 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 12 # FP16: fabs h1, h2 20 # FP16: fadd h1, h2, h3 28 # FP16: fdiv h1, h2, h3 36 # FP16: fmadd h1, h2, h3, h4 47 # FP16: fmax h1, h2, h3 50 # FP16: fmaxnm h1, h2, h3 61 # FP16: fmin h1, h2, h3 64 # FP16: fminnm h1, h2, h3 72 # FP16: fmsub h1, h2, h3, h4 [all …]
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D | armv8.3a-complex.txt | 2 # RUN: FileCheck %s < %t --check-prefix=NO-FP16 3 …tr=+v8.3a,+fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 8 # FP16: fcmla v0.4h, v1.4h, v2.4h, #0 9 # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding 12 # FP16: fcmla v0.8h, v1.8h, v2.8h, #0 13 # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding 42 # FP16: fcadd v0.4h, v1.4h, v2.4h, #90 43 # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding 46 # FP16: fcadd v0.8h, v1.8h, v2.8h, #90 47 # NO-FP16: :[[@LINE-2]]:{{[0-9]*}}: warning: invalid instruction encoding [all …]
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 415 FP16 = 0x00C00000, enumerator 435 NEON_FP_4H = FP16, 437 NEON_FP_8H = FP16 | NEON_Q, 1270 FCMP_h = FPCompareFixed | FP16 | 0x00000000, 1274 FCMP_h_zero = FPCompareFixed | FP16 | 0x00000008, 1278 FCMPE_h = FPCompareFixed | FP16 | 0x00000010, 1282 FCMPE_h_zero = FPCompareFixed | FP16 | 0x00000018, 1293 FCCMP_h = FPConditionalCompareFixed | FP16 | 0x00000000, 1297 FCCMPE_h = FPConditionalCompareFixed | FP16 | 0x00000010, 1308 FCSEL_h = FPConditionalSelectFixed | FP16 | 0x00000000, [all …]
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/external/llvm/test/MC/ARM/ |
D | neon-vcvt-fp16.s | 2 @ RUN: FileCheck %s --check-prefix=CHECK-FP16 6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee] 9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee] 13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee] 16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | neon-vcvt-fp16.s | 2 @ RUN: FileCheck %s --check-prefix=CHECK-FP16 6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee] 9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee] 13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee] 16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | fp16.ll | 2 ; RUN: llc -mattr=+vfp3,+fp16 < %s | FileCheck --check-prefix=CHECK-FP16 %s 18 ; CHECK-FP16: vcvtb.f16.f32 21 ; CHECK-FP16: vcvtb.f16.f32 25 ; CHECK-FP16: vcvtb.f32.f16
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/external/tensorflow/tensorflow/compiler/tf2tensorrt/convert/ |
D | utils.cc | 29 case TrtPrecisionMode::FP16: in TrtPrecisionModeToName() 45 *mode = TrtPrecisionMode::FP16; in TrtPrecisionModeFromName()
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D | utils.h | 36 enum class TrtPrecisionMode { FP32, FP16, INT8 }; enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/CostModel/AMDGPU/ |
D | fdiv.ll | 6 …900 -mattr=+fp32-denormals < %s | FileCheck -check-prefixes=ALL,FP32DENORMS,FASTFP32DENORMS,FP16 %s 77 ; FP16: estimated cost of 10 for {{.*}} fdiv half 88 ; FP16: estimated cost of 20 for {{.*}} fdiv <2 x half> 99 ; FP16: estimated cost of 40 for {{.*}} fdiv <4 x half> 121 ; FP16: estimated cost of 3 for {{.*}} fdiv half 155 ; FP16: estimated cost of 6 for {{.*}} fdiv <2 x half>
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/external/deqp/external/vulkancts/modules/vulkan/spirv_assembly/ |
D | vktSpvAsmFloatControlsTests.cpp | 52 FP16 = 0, enumerator 858 m_floatType = FP16; in TypeTestResults() 1262 , restrictedInputType(FP16) // not used as isInputTypeRestricted is false in Operation() 1297 , restrictedInputType(FP16) // not used as isInputTypeRestricted is false in Operation() 1440 mo[O_CONV_FROM_FP16] = Op("conv_from_fp16", false, FP16, "", convertSource); in init() 1882 if (typeTestResults->floatType() == FP16) in build() 2203 m_typeData[FP16] = TypeData(); in TestGroupBuilderBase() 2204 m_typeData[FP16].values = TypeValuesSP(new TypeValues<deFloat16>); in TestGroupBuilderBase() 2205 m_typeData[FP16].snippets = TypeSnippetsSP(new TypeSnippets<deFloat16>); in TestGroupBuilderBase() 2206 m_typeData[FP16].testResults = TypeTestResultsSP(new TypeTestResults<deFloat16>); in TestGroupBuilderBase() [all …]
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