| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 518 FP16_TO_FP, FP_TO_FP16, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 551 FP16_TO_FP, FP_TO_FP16, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 260 case ISD::FP16_TO_FP: return "fp16_to_fp"; in getOperationName()
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| D | LegalizeFloatTypes.cpp | 96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break; in SoftenFloatResult()
838 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op); in SoftenFloatOp_FP_EXTEND()
1725 return ISD::FP16_TO_FP; in GetPromotionOpcode()
1857 case ISD::FP16_TO_FP: in PromoteFloatResult()
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| D | LegalizeDAG.cpp | 873 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps()
3168 case ISD::FP16_TO_FP: in ExpandNode()
3174 DAG.getNode(ISD::FP16_TO_FP, dl, MVT::f32, Node->getOperand(0)); in ExpandNode()
3925 case ISD::FP16_TO_FP: in ConvertNodeToLibcall()
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| D | DAGCombiner.cpp | 1443 case ISD::FP16_TO_FP: return visitFP16_TO_FP(N); in visit()
9220 if (N0.getOpcode() == ISD::FP16_TO_FP && in visitFP_EXTEND()
9221 TLI.getOperationAction(ISD::FP16_TO_FP, VT) == TargetLowering::Legal) in visitFP_EXTEND()
9222 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), VT, N0.getOperand(0)); in visitFP_EXTEND()
13817 if (N0->getOpcode() == ISD::FP16_TO_FP) in visitFP_TO_FP16()
13830 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), N->getValueType(0), in visitFP16_TO_FP()
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| D | LegalizeIntegerTypes.cpp | 913 case ISD::FP16_TO_FP: in PromoteIntegerOperand()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break; in SoftenFloatResult()
853 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op); in SoftenFloatOp_FP_EXTEND()
1742 return ISD::FP16_TO_FP; in GetPromotionOpcode()
1875 case ISD::FP16_TO_FP: in PromoteFloatResult()
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| D | SelectionDAGDumper.cpp | 303 case ISD::FP16_TO_FP: return "fp16_to_fp"; in getOperationName()
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| D | LegalizeDAG.cpp | 900 Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result); in LegalizeLoadOps()
3275 case ISD::FP16_TO_FP: in ExpandNode()
3281 DAG.getNode(ISD::FP16_TO_FP, dl, MVT::f32, Node->getOperand(0)); in ExpandNode()
4211 case ISD::FP16_TO_FP: in ConvertNodeToLibcall()
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| D | DAGCombiner.cpp | 1598 case ISD::FP16_TO_FP: return visitFP16_TO_FP(N); in visit()
11776 if (N0.getOpcode() == ISD::FP16_TO_FP && in visitFP_EXTEND()
11777 TLI.getOperationAction(ISD::FP16_TO_FP, VT) == TargetLowering::Legal) in visitFP_EXTEND()
11778 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), VT, N0.getOperand(0)); in visitFP_EXTEND()
17420 if (N0->getOpcode() == ISD::FP16_TO_FP) in visitFP_TO_FP16()
17433 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), N->getValueType(0), in visitFP16_TO_FP()
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| D | LegalizeIntegerTypes.cpp | 950 case ISD::FP16_TO_FP: in PromoteIntegerOperand()
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| D | SelectionDAG.cpp | 3826 case ISD::FP16_TO_FP: { in getNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 343 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in AMDGPUTargetLowering()
3635 case ISD::FP16_TO_FP: { in performFNegCombine()
3647 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFNeg); in performFNegCombine()
3663 case ISD::FP16_TO_FP: { in performFAbsCombine()
3672 return DAG.getNode(ISD::FP16_TO_FP, SL, N->getValueType(0), IntFAbs); in performFAbsCombine()
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| D | SIISelLowering.cpp | 436 setOperationAction(ISD::FP16_TO_FP, MVT::i16, Promote); in SITargetLowering()
437 AddPromotedToType(ISD::FP16_TO_FP, MVT::i16, MVT::i32); in SITargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 1478 ISD::FP16_TO_FP, 0),
1480 ISD::FP16_TO_FP, 0),
1482 ISD::FP16_TO_FP, 0),
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| D | X86InstrFragmentsSIMD.td | 555 def X86cvtph2ps : SDNode<"ISD::FP16_TO_FP",
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 100 setOperationAction(ISD::FP16_TO_FP, T, Expand); in WebAssemblyTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 463 def f16_to_fp : SDNode<"ISD::FP16_TO_FP" , SDTIntToFPOp>;
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 374 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); in MipsTargetLowering()
376 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in MipsTargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 451 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); in MipsTargetLowering()
453 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in MipsTargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 445 def f16_to_fp : SDNode<"ISD::FP16_TO_FP" , SDTIntToFPOp>;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 289 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 959 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in ARMTargetLowering()
965 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); in ARMTargetLowering()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1091 setOperationAction(ISD::FP16_TO_FP, MVT::f64, Expand); in ARMTargetLowering()
1097 setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand); in ARMTargetLowering()
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