| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ScheduleZnver1.td | 960 // FPREM1.
961 def : InstRW<[WriteMicrocoded], (instrs FPREM1)>;
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| D | X86SchedHaswell.td | 766 // FPREM1.
771 def : InstRW<[HWWriteFPREM1], (instrs FPREM1)>;
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| D | X86ScheduleAtom.td | 798 def : InstRW<[AtomWrite01_71], (instrs FPREM1,
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| D | X86InstrFPStack.td | 665 def FPREM1 : I<0xD9, MRM_F5, (outs), (ins), "fprem1", []>;
|
| /external/llvm/lib/Target/X86/ |
| D | X86SchedHaswell.td | 1227 // FPREM1.
1232 def : InstRW<[WriteFPREM1], (instregex "FPREM1")>;
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| D | X86InstrFPStack.td | 656 def FPREM1 : I<0xD9, MRM_F5, (outs), (ins), "fprem1", [], IIC_FPREM1>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrFPStack.td | 580 def FPREM1 : I<0xF5, RawFrm, (outs), (ins), "fprem1", []>, D9;
|
| D | X86GenAsmWriter.inc | 759 3136U, // FPREM1
5873 "FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINCOS\000"
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| D | X86GenAsmWriter1.inc | 759 2468U, // FPREM1
6616 "FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINCOS\000"
|
| D | X86GenInstrInfo.inc | 762 FPREM1 = 746,
4930 …{ 746, 0, 0, 0, 0, "FPREM1", 0|(1<<MCID::UnmodeledSideEffects), 0x1ea000401ULL, NULL, NULL, 0 }, …
|
| D | X86GenAsmMatcher.inc | 3515 { X86::FPREM1, "fprem1", Convert, { }, 0},
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| D | X86GenDisassemblerTables.inc | 8971 "FPREM1"
50418 0x2ea, /* FPREM1*/
57437 0x2ea, /* FPREM1*/
64602 0x2ea, /* FPREM1*/
71767 0x2ea, /* FPREM1*/
78932 0x2ea, /* FPREM1*/
85956 0x2ea, /* FPREM1*/
92975 0x2ea, /* FPREM1*/
99994 0x2ea, /* FPREM1*/
107013 0x2ea, /* FPREM1*/
[all …]
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 758 #define FPREM1 CHOICE(fprem1, fprem1, fprem1) macro
1471 #define FPREM1 fprem1 macro
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 5367 {DBGFIELD("FPREM1") 1, false, false, 29, 1, 23, 1, 0, 0}, // #655
6583 {DBGFIELD("FPREM1") 1, false, false, 79, 2, 4, 1, 0, 0}, // #655
7799 {DBGFIELD("FPREM1") 1, false, false, 1, 1, 4, 1, 0, 0}, // #655
9015 {DBGFIELD("FPREM1") 1, false, false, 79, 2, 4, 1, 0, 0}, // #655
10231 {DBGFIELD("FPREM1") 1, false, false, 226, 2, 4, 1, 0, 0}, // #655
11447 {DBGFIELD("FPREM1") 41, false, false, 0, 0, 74, 1, 0, 0}, // #655
12663 {DBGFIELD("FPREM1") 1, false, false, 3037, 2, 4, 1, 0, 0}, // #655
13879 {DBGFIELD("FPREM1") 1, false, false, 79, 2, 4, 1, 0, 0}, // #655
15095 {DBGFIELD("FPREM1") 1, false, false, 0, 0, 4, 1, 0, 0}, // #655
|
| D | X86GenAsmWriter.inc | 2805 16228U, // FPREM1
18311 0U, // FPREM1
33817 0U, // FPREM1
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| D | X86GenAsmWriter1.inc | 2485 12975U, // FPREM1
17991 0U, // FPREM1
|
| D | X86GenInstrInfo.inc | 1052 FPREM1 = 1037,
16187 FPREM1 = 655,
18851 …Effects), 0x3640000075ULL, nullptr, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #1037 = FPREM1
|
| D | X86GenAsmMatcher.inc | 7633 { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
22191 { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
|
| /external/capstone/arch/X86/ |
| D | X86GenAsmWriter.inc | 812 13784U, // FPREM1
7083 0U, // FPREM1
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| D | X86GenAsmWriter1.inc | 812 10867U, // FPREM1
7083 0U, // FPREM1
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| D | X86GenDisassemblerTables.inc | 10476 /* FPREM1 */
49509 0x31b, /* FPREM1 */
|
| /external/syzkaller/pkg/ifuzz/gen/ |
| D | all-enc-instructions.txt | 538 ICLASS : FPREM1
|