/external/vixl/src/ |
D | utils-vixl.cc | 268 float FPToFloat(Float16 value, UseDefaultNaN DN, bool* exception) { in FPToFloat() function 335 float FPToFloat(double value, in FPToFloat() function 401 return FPToFloat(value, DN, exception); in FPToDouble()
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D | utils-vixl.h | 1261 float FPToFloat(Float16 value, UseDefaultNaN DN, bool* exception = NULL); 1262 float FPToFloat(double value,
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/external/vixl/test/aarch64/ |
D | test-utils-aarch64.cc | 106 FPToFloat(expected, kIgnoreDefaultNaN), in EqualFP16() 108 FPToFloat(result, kIgnoreDefaultNaN), in EqualFP16() 204 FPToFloat(expected, kIgnoreDefaultNaN), in EqualFP16()
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/external/v8/src/arm64/ |
D | simulator-logic-arm64.cc | 134 float Simulator::FPToFloat(float16 value) { in FPToFloat() function in v8::internal::Simulator 293 float Simulator::FPToFloat(double value, FPRounding round_mode) { in FPToFloat() function in v8::internal::Simulator 3760 dst.SetFloat(i, FPToFloat(src.Float<float16>(i))); in fcvtl() 3776 dst.SetFloat(i, FPToFloat(src.Float<float16>(i + lane_count))); in fcvtl2() 3796 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn() 3812 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPTieEven)); in fcvtn2() 3823 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn() 3833 dst.SetFloat(i + lane_count, FPToFloat(src.Float<double>(i), FPRoundOdd)); in fcvtxn2()
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D | simulator-arm64.h | 2022 float FPToFloat(double value, FPRounding round_mode); 2023 float FPToFloat(float16 value);
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D | simulator-arm64.cc | 2765 set_sreg(fd, FPToFloat(dreg(fn), FPTieEven)); in VisitFPDataProcessing1Source() 2771 set_sreg(fd, FPToFloat(hreg(fn))); in VisitFPDataProcessing1Source() 2774 set_dreg(fd, FPToDouble(FPToFloat(hreg(fn)))); in VisitFPDataProcessing1Source()
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/external/vixl/src/aarch64/ |
D | logic-aarch64.cc | 4821 FPToFloat(RawbitsToFloat16(src.Float<uint16_t>(i)), in fcvtl() 4842 FPToFloat(RawbitsToFloat16( in fcvtl2() 4868 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPTieEven, ReadDN())); in fcvtn() 4889 FPToFloat(src.Float<double>(i), FPTieEven, ReadDN())); in fcvtn2() 4902 dst.SetFloat(i, FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn() 4915 FPToFloat(src.Float<double>(i), FPRoundOdd, ReadDN())); in fcvtxn2()
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D | disasm-aarch64.cc | 5171 ? FPToFloat(instr->GetImmFP16(), kIgnoreDefaultNaN) in SubstituteImmediateField() 5310 FPToFloat(instr->GetImmNEONFP16(), in SubstituteImmediateField()
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D | macro-assembler-aarch64.cc | 1561 Fmov(vd, FPToFloat(imm, kIgnoreDefaultNaN)); in Fmov()
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D | simulator-aarch64.cc | 3347 WriteSRegister(fd, FPToFloat(ReadDRegister(fn), FPTieEven, ReadDN())); in VisitFPDataProcessing1Source() 3355 WriteSRegister(fd, FPToFloat(ReadHRegister(fn), ReadDN())); in VisitFPDataProcessing1Source()
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