| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 153 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
155 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
157 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
171 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
173 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
175 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 }, in getCastInstrCost()
188 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
190 { ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
192 { ISD::FP_TO_SINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
194 { ISD::FP_TO_SINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 214 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
216 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
218 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
232 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
234 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
236 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 }, in getCastInstrCost()
249 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
251 { ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
253 { ISD::FP_TO_SINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
255 { ISD::FP_TO_SINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 256 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
257 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
258 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
264 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
265 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
266 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
272 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
273 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
278 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
279 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 359 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
360 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
361 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
367 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
368 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
369 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
375 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
376 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
381 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
382 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | avx-fp2int.ll | 3 ;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | avx-fp2int.ll | 3 ;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | fcmp.ll | 19 ; SET* + FP_TO_SINT
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | fcmp.ll | 19 ; SET* + FP_TO_SINT
|
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 587 ISD::FP_TO_SINT, 0),
589 ISD::FP_TO_SINT, 0),
591 ISD::FP_TO_SINT, ISD::FP_TO_SINT),
593 ISD::FP_TO_SINT, 0),
595 ISD::FP_TO_SINT, 0),
597 ISD::FP_TO_SINT, ISD::FP_TO_SINT),
611 ISD::FP_TO_SINT, 0),
613 ISD::FP_TO_SINT, 0),
615 ISD::FP_TO_SINT, ISD::FP_TO_SINT),
617 ISD::FP_TO_SINT, 0),
[all …]
|
| D | README-FPStack.txt | 50 FP_TO_SINT when the source operand is already in memory.
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 299 case ISD::FP_TO_SINT: in LegalizeOp()
392 case ISD::FP_TO_SINT: in Promote()
394 return PromoteFP_TO_INT(Op, Op->getOpcode() == ISD::FP_TO_SINT); in Promote()
478 if (TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NewVT)) { in PromoteFP_TO_INT()
479 NewOpc = ISD::FP_TO_SINT; in PromoteFP_TO_INT()
|
| D | LegalizeFloatTypes.cpp | 759 case ISD::FP_TO_SINT: in SoftenFloatOperand()
887 bool Signed = N->getOpcode() == ISD::FP_TO_SINT; in SoftenFloatOp_FP_TO_XINT()
1509 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break; in ExpandFloatOperand()
1616 return DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Res); in ExpandFloatOp_FP_TO_SINT()
1641 DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, in ExpandFloatOp_FP_TO_UINT()
1648 DAG.getNode(ISD::FP_TO_SINT, dl, in ExpandFloatOp_FP_TO_UINT()
1747 case ISD::FP_TO_SINT: in PromoteFloatOperand()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 384 FP_TO_SINT, enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | README-FPStack.txt | 50 FP_TO_SINT when the source operand is already in memory.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | README-FPStack.txt | 50 FP_TO_SINT when the source operand is already in memory.
|
| D | X86TargetTransformInfo.cpp | 1163 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f32, 1 }, in getCastInstrCost()
1164 { ISD::FP_TO_SINT, MVT::v4i64, MVT::v4f32, 1 }, in getCastInstrCost()
1165 { ISD::FP_TO_SINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
1166 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
1167 { ISD::FP_TO_SINT, MVT::v4i64, MVT::v4f64, 1 }, in getCastInstrCost()
1168 { ISD::FP_TO_SINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
1341 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 1 }, in getCastInstrCost()
1342 { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 7 }, in getCastInstrCost()
1414 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 3 }, in getCastInstrCost()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 448 FP_TO_SINT, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 494 FP_TO_SINT, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 358 case ISD::FP_TO_SINT: in LegalizeOp()
464 case ISD::FP_TO_SINT: in Promote()
541 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT)) in PromoteFP_TO_INT()
542 NewOpc = ISD::FP_TO_SINT; in PromoteFP_TO_INT()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeFloatTypes.cpp | 587 case ISD::FP_TO_SINT: Res = SoftenFloatOp_FP_TO_SINT(N); break; in SoftenFloatOperand()
1267 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break; in ExpandFloatOperand()
1364 return DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Res); in ExpandFloatOp_FP_TO_SINT()
1388 DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, in ExpandFloatOp_FP_TO_UINT()
1394 DAG.getNode(ISD::FP_TO_SINT, dl, in ExpandFloatOp_FP_TO_UINT()
|
| D | LegalizeVectorOps.cpp | 170 case ISD::FP_TO_SINT: in LegalizeOp()
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 325 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote); in SPUTargetLowering()
327 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote); in SPUTargetLowering()
331 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in SPUTargetLowering()
333 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Expand); in SPUTargetLowering()
335 setOperationAction(ISD::FP_TO_SINT, MVT::i128, Expand); in SPUTargetLowering()
383 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in SPUTargetLowering()
2470 (Op.getOpcode() == ISD::FP_TO_SINT) in LowerFP_TO_INT()
2819 case ISD::FP_TO_SINT: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 225 setOperationAction(ISD::FP_TO_SINT, MVT::ppcf128, Custom); in PPCTargetLowering()
372 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Legal); in PPCTargetLowering()
377 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
501 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
522 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
528 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
653 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in PPCTargetLowering()
792 setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal); in PPCTargetLowering()
904 setOperationAction(ISD::FP_TO_SINT , MVT::v4f64, Legal); in PPCTargetLowering()
953 setOperationAction(ISD::FP_TO_SINT , MVT::v4f32, Legal); in PPCTargetLowering()
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 163 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Custom); in R600TargetLowering()
164 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in R600TargetLowering()
276 setTargetDAGCombine(ISD::FP_TO_SINT); in R600TargetLowering()
666 case ISD::FP_TO_SINT: { in ReplaceNodeResults()
1862 case ISD::FP_TO_SINT: { in PerformDAGCombine()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 260 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
370 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
388 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
394 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
515 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in PPCTargetLowering()
646 setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal); in PPCTargetLowering()
701 setOperationAction(ISD::FP_TO_SINT , MVT::v4f64, Legal); in PPCTargetLowering()
751 setOperationAction(ISD::FP_TO_SINT , MVT::v4f32, Legal); in PPCTargetLowering()
6389 Op.getOpcode() == ISD::FP_TO_SINT in LowerFP_TO_INTForReuse()
6395 assert((Op.getOpcode() == ISD::FP_TO_SINT || Subtarget.hasFPCVT()) && in LowerFP_TO_INTForReuse()
[all …]
|