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Searched refs:FRACT (Results 1 – 21 of 21) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dfract.f64.ll20 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
24 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]], -[[FLOORX]]
27 ; GCN-UNSAFE: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
29 ; GCN: buffer_store_dwordx2 [[FRACT]]
47 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
51 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]], -[[FLOORX]]
54 ; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]]
56 ; GCN: buffer_store_dwordx2 [[FRACT]]
75 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO]]:[[HI]]{{\]}}|, -[[SUB0]]
79 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|, -[[FLOORX]]
[all …]
Dfract.ll60 ; GCN-UNSAFE-DAG: v_fract_f32_e32 [[FRACT:v[0-9]+]], [[INPUT:v[0-9]+]]
63 ; GCN-UNSAFE: buffer_store_dword [[FRACT]]
Dllvm.cos.ll7 ;EG: FRACT *
Dllvm.sin.ll6 ; EG: FRACT *
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dfract.f64.ll20 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
24 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]], -[[FLOORX]]
27 ; GCN-UNSAFE: v_fract_f64_e32 [[FRACT:v\[[0-9]+:[0-9]+\]]], [[X]]
29 ; GCN: buffer_store_dwordx2 [[FRACT]]
47 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -v{{\[}}[[LO]]:[[HI]]{{\]}}, -[[SUB0]]
51 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]], -[[FLOORX]]
54 ; GCN-UNSAFE: v_fract_f64_e64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -[[X]]
56 ; GCN: buffer_store_dwordx2 [[FRACT]]
75 ; SI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|v{{\[}}[[LO]]:[[HI]]{{\]}}|, -[[SUB0]]
79 ; CI: v_add_f64 [[FRACT:v\[[0-9]+:[0-9]+\]]], -|[[X]]|, -[[FLOORX]]
[all …]
Dfract.ll60 ; GCN-UNSAFE-DAG: v_fract_f32_e32 [[FRACT:v[0-9]+]], [[INPUT:v[0-9]+]]
63 ; GCN-UNSAFE: buffer_store_dword [[FRACT]]
Dllvm.cos.ll7 ;EG: FRACT *
Dllvm.sin.ll6 ; EG: FRACT *
Dfneg-combines.ll1609 ; GCN: v_fract_f32_e32 [[FRACT:v[0-9]+]], [[MUL]]
1610 ; GCN: v_sin_f32_e32 [[RESULT:v[0-9]+]], [[FRACT]]
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h229 FRACT, enumerator
DAMDGPUInstrInfo.td59 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>;
DR600Instructions.td741 def FRACT : R600_1OP_Helper <0x10, "FRACT", AMDGPUfract>;
DSIISelLowering.cpp1876 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
2367 SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, DL, VT, in LowerTrig()
3049 case AMDGPUISD::FRACT: in PerformDAGCombine()
DR600ISelLowering.cpp939 SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, DL, VT, in LowerTrig()
DAMDGPUISelLowering.cpp2806 NODE_NAME_CASE(FRACT) in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h340 FRACT, enumerator
DAMDGPUInstrInfo.td131 def AMDGPUfract : SDNode<"AMDGPUISD::FRACT", SDTFPUnaryOp>;
DR600Instructions.td752 def FRACT : R600_1OP_Helper <0x10, "FRACT", AMDGPUfract>;
DSIISelLowering.cpp4954 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
6104 SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, DL, VT, in LowerTrig()
6720 case AMDGPUISD::FRACT: in fp16SrcZerosHighBits()
7868 case AMDGPUISD::FRACT: in PerformDAGCombine()
DR600ISelLowering.cpp763 SDValue FractPart = DAG.getNode(AMDGPUISD::FRACT, DL, VT, in LowerTrig()
DAMDGPUISelLowering.cpp4007 NODE_NAME_CASE(FRACT) in getTargetNodeName()