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Searched refs:FRSQRT (Results 1 – 22 of 22) sorted by relevance

/external/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h264 X86_INTRINSIC_DATA(avx_rsqrt_ps_256, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
1808 X86_INTRINSIC_DATA(avx512_rsqrt14_pd_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1809 X86_INTRINSIC_DATA(avx512_rsqrt14_pd_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1810 X86_INTRINSIC_DATA(avx512_rsqrt14_pd_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1811 X86_INTRINSIC_DATA(avx512_rsqrt14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1812 X86_INTRINSIC_DATA(avx512_rsqrt14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1813 X86_INTRINSIC_DATA(avx512_rsqrt14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),
1872 X86_INTRINSIC_DATA(sse_rsqrt_ps, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
DX86ISelLowering.h252 FRSQRT, FRCP, enumerator
DX86InstrFragmentsSIMD.td61 def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
DX86ISelLowering.cpp14946 return DCI.DAG.getNode(X86ISD::FRSQRT, SDLoc(Op), VT, Op); in getRsqrtEstimate()
22143 case X86ISD::FRSQRT: return "X86ISD::FRSQRT"; in getTargetNodeName()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h201 FRSQRT, FRCP, enumerator
DX86InstrFragmentsSIMD.td49 def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
DX86GenFastISel.inc1076 // FastEmit functions for X86ISD::FRSQRT.
1426 case X86ISD::FRSQRT: return FastEmit_X86ISD_FRSQRT_r(VT, RetVT, Op0, Op0IsKill);
DX86ISelLowering.cpp10666 case X86ISD::FRSQRT: return "X86ISD::FRSQRT"; in getTargetNodeName()
DX86GenDAGISel.inc40156 /*SwitchOpcode*/ 96|128,1/*224*/, TARGET_VAL(X86ISD::FRSQRT),// ->84011
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.h263 FRSQRT, FRCP, enumerator
DX86IntrinsicsInfo.h319 X86_INTRINSIC_DATA(avx_rsqrt_ps_256, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
1160 X86_INTRINSIC_DATA(sse_rsqrt_ps, INTR_TYPE_1OP, X86ISD::FRSQRT, 0),
DX86InstrFragmentsSIMD.td57 def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
DX86ISelLowering.cpp18021 if (DAG.getNodeIfExists(X86ISD::FRSQRT, DAG.getVTList(VT), Op)) in isFsqrtCheap()
18056 unsigned Opcode = VT == MVT::v16f32 ? X86ISD::RSQRT14 : X86ISD::FRSQRT; in getSqrtEstimate()
25964 case X86ISD::FRSQRT: return "X86ISD::FRSQRT"; in getTargetNodeName()
/external/v8/src/mips/
Dconstants-mips.h814 FRSQRT = (4U << 17), enumerator
Ddisasm-mips.cc2641 case FRSQRT: in DecodeTypeMsa2RF()
Dassembler-mips.cc3410 V(frsqrt, FRSQRT) \
Dsimulator-mips.cc6009 case FRSQRT: { in Msa2RFInstrHelper()
/external/v8/src/mips64/
Dconstants-mips64.h848 FRSQRT = (4U << 17), enumerator
Ddisasm-mips64.cc2955 case FRSQRT: in DecodeTypeMsa2RF()
Dassembler-mips64.cc3728 V(frsqrt, FRSQRT) \
Dsimulator-mips64.cc6240 case FRSQRT: { in Msa2RFInstrHelper()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc3598 // FastEmit functions for X86ISD::FRSQRT.
5536 case X86ISD::FRSQRT: return fastEmit_X86ISD_FRSQRT_r(VT, RetVT, Op0, Op0IsKill);