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Searched refs:FRegs (Results 1 – 5 of 5) sorted by relevance

/external/capstone/arch/PowerPC/
DPPCDisassembler.c52 static const unsigned FRegs[] = { variable
179 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
186 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF8RCRegisterClass()
/external/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp81 static const unsigned FRegs[] = { variable
236 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
242 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF8RCRegisterClass()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp81 static const unsigned FRegs[] = { variable
269 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF4RCRegisterClass()
275 return decodeRegisterClass(Inst, RegNo, FRegs); in DecodeF8RCRegisterClass()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp76 static const MCPhysReg FRegs[32] = { variable
613 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF4RCOperands()
618 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF8RCOperands()
1354 RegNo = FRegs[IntVal]; in MatchRegisterName()
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp76 static const MCPhysReg FRegs[32] = { variable
591 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF4RCOperands()
596 Inst.addOperand(MCOperand::createReg(FRegs[getReg()])); in addRegF8RCOperands()
1289 RegNo = FRegs[IntVal]; in MatchRegisterName()