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Searched refs:FSL_CHASSIS3_SRDS1_REGSR (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/board/freescale/ls1088a/
Deth_ls1088aqds.c417 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in initialize_dpmac_to_slot()
470 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_sgmii()
522 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_qsgmii()
561 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_xsgmii()
586 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in ls1088a_handle_phy_interface_rgmii()
Deth_ls1088ardb.c30 cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) & in board_eth_init()
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dfsl_lsch3_serdes.c73 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in serdes_get_first_lane()
338 u32 cfg_rcwsrds1 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in setup_serdes_volt()
462 FSL_CHASSIS3_SRDS1_REGSR, in fsl_serdes_init()
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch3.h268 #define FSL_CHASSIS3_SRDS1_REGSR 29 macro
285 #define FSL_CHASSIS3_SRDS1_REGSR 29 macro