Searched refs:FSL_CORENET2_RCWSR4_SRDS1_PRTCL (Results 1 – 15 of 15) sorted by relevance
49 srds_s1 = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in checkboard()101 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_mux_lane()
38 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
37 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
130 cfg &= FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in serdes_get_first_lane()353 FSL_CORENET2_RCWSR4_SRDS1_PRTCL, in fsl_serdes_init()
238 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in initialize_lane_to_slot()262 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
95 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_mux_lane_to_slot()
212 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_ft_fman_fixup_port()451 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in initialize_lane_to_slot()524 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
99 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in brd_mux_lane_to_slot()
48 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
160 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()
339 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in configure_vsc3316_3308()783 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in config_serdes1_refclks()
190 FSL_CORENET2_RCWSR4_SRDS1_PRTCL) in initialize_lane_to_slot()
1762 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfc000000 macro1772 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xfe000000 macro1778 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff000000 macro1798 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff800000 macro1812 #define FSL_CORENET2_RCWSR4_SRDS1_PRTCL 0xff000000 macro
352 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in config_frontside_crossbar_vsc3316()
496 FSL_CORENET2_RCWSR4_SRDS1_PRTCL; in board_eth_init()