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Searched refs:FSL_DDR_BANK_INTERLEAVING (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/board/freescale/b4860qds/
Dddr.c221 case FSL_DDR_BANK_INTERLEAVING: in step_assign_addresses()
/external/u-boot/drivers/ddr/fsl/
Dmain.c333 case FSL_DDR_BANK_INTERLEAVING: in __step_assign_addresses()
712 case FSL_DDR_BANK_INTERLEAVING: in __fsl_ddr_sdram()
Dutil.c289 case FSL_DDR_BANK_INTERLEAVING: in print_ddr_info()
Doptions.c1135 0 : FSL_DDR_BANK_INTERLEAVING; in populate_memctl_options()
1367 case FSL_DDR_BANK_INTERLEAVING: in check_interleaving_options()
Dctrl_regs.c180 case FSL_DDR_BANK_INTERLEAVING: in set_csn_config()
/external/u-boot/include/
Dfsl_ddr_sdram.h91 #define FSL_DDR_BANK_INTERLEAVING 0x2 macro