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Searched refs:FSL_SRDSCR2_OFFS (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dserdes.c25 #define FSL_SRDSCR2_OFFS 0x8 macro
58 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
60 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
85 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
88 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
108 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
111 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
130 tmp = in_be32(regs + FSL_SRDSCR2_OFFS); in fsl_setup_serdes()
133 out_be32(regs + FSL_SRDSCR2_OFFS, tmp); in fsl_setup_serdes()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dmpc8536_serdes.c35 #define FSL_SRDSCR2_OFFS 0x8 macro
127 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
132 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
153 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
156 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
177 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
182 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()
203 tmp = in_be32(sd + FSL_SRDSCR2_OFFS); in fsl_serdes_init()
206 out_be32(sd + FSL_SRDSCR2_OFFS, tmp); in fsl_serdes_init()