| /external/vixl/examples/aarch64/ |
| D | add4-double.cc | 44 __ Fadd(d0, d0, d1); in GenerateAdd4Double() local
45 __ Fadd(d2, d2, d3); in GenerateAdd4Double() local
46 __ Fadd(d0, d0, d2); in GenerateAdd4Double() local
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| D | add3-double.cc | 37 __ Fadd(d0, d0, d1); // d0 <- x + y in GenerateAdd3Double() local
38 __ Fadd(d0, d0, d2); // d0 <- d0 + z in GenerateAdd3Double() local
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| D | custom-disassembler.cc | 128 __ Fadd(d30, d16, d17); in GenerateCustomDisassemblerTestCode() local
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| /external/swiftshader/third_party/subzero/crosstest/ |
| D | test_arith.def | 44 X(Fadd, +, ) \
55 // instruction and "(a + b)" for the Fadd instruction. The two
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInst.def | 37 X(Fadd, "fadd", 1) \
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| D | IceConverter.cpp | 297 return convertArithInstruction(Instr, Ice::InstArithmetic::Fadd); in convertInstruction()
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| D | IceTargetLoweringARM32.cpp | 2909 case InstArithmetic::Fadd: in lowerInt64Arithmetic()
3105 case InstArithmetic::Fadd: in lowerArithmetic()
3162 case InstArithmetic::Fadd: { in lowerArithmetic()
3510 case InstArithmetic::Fadd: in lowerArithmetic()
6959 case InstArithmetic::Fadd: in isValidConsumer()
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| D | WasmTranslator.cpp | 412 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Fadd, in Binop()
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| D | IceTargetLoweringX86BaseImpl.h | 2057 case InstArithmetic::Fadd:
2193 case InstArithmetic::Fadd: {
2525 case InstArithmetic::Fadd:
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| D | PNaClTranslator.cpp | 1764 Op = Ice::InstArithmetic::Fadd; in convertBinopOpcode()
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| D | IceTargetLoweringMIPS32.cpp | 2734 case InstArithmetic::Fadd: in lowerInt64Arithmetic()
2993 case InstArithmetic::Fadd: { in lowerArithmetic()
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| /external/v8/src/wasm/baseline/arm64/ |
| D | liftoff-assembler-arm64.h | 418 FP32_BINOP(f32_add, Fadd) in I32_BINOP()
431 FP64_BINOP(f64_add, Fadd) in I32_BINOP()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 10589 __ Fadd(s0, s17, s18); in TEST() local
10590 __ Fadd(s1, s18, s19); in TEST() local
10591 __ Fadd(s2, s14, s18); in TEST() local
10592 __ Fadd(s3, s15, s18); in TEST() local
10593 __ Fadd(s4, s16, s18); in TEST() local
10594 __ Fadd(s5, s15, s16); in TEST() local
10595 __ Fadd(s6, s16, s15); in TEST() local
10597 __ Fadd(d7, d30, d31); in TEST() local
10598 __ Fadd(d8, d29, d31); in TEST() local
10599 __ Fadd(d9, d26, d31); in TEST() local
[all …]
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| D | test-simulator-aarch64.cc | 5002 __ Fadd(temp, temp, input_1.D()); in GenerateSum() local
5003 __ Fadd(result, temp, input_3); in GenerateSum() local
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| D | test-disasm-aarch64.cc | 4954 COMPARE_MACRO(Fadd(v12.V8H(), v13.V8H(), v14.V8H()), in TEST()
4956 COMPARE_MACRO(Fadd(v15.V4H(), v16.V4H(), v17.V4H()), in TEST()
5090 COMPARE_MACRO(Fadd(v0.M, v1.M, v2.M), "fadd v0." S ", v1." S ", v2." S); in TEST()
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1305 __ Fadd(i.OutputFloat32Register(), i.InputFloat32Register(0), in AssembleArchInstruction() local
1340 __ Fadd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
1742 SIMD_BINOP_CASE(kArm64F32x4Add, Fadd, 4S); in AssembleArchInstruction()
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 487 void TurboAssembler::Fadd(const VRegister& fd, const VRegister& fn, in Fadd() function
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| D | macro-assembler-arm64.h | 926 inline void Fadd(const VRegister& fd, const VRegister& fn,
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2595 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2); in ExpandLegalINT_TO_FP() local
2596 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd, in ExpandLegalINT_TO_FP()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2414 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2); in ExpandLegalINT_TO_FP() local
2415 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd, in ExpandLegalINT_TO_FP()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2448 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2); in ExpandLegalINT_TO_FP() local
2449 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd, in ExpandLegalINT_TO_FP()
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| /external/swiftshader/src/Reactor/ |
| D | SubzeroReactor.cpp | 706 case Ice::InstArithmetic::Fadd: in isCommutative()
758 return createArithmetic(Ice::InstArithmetic::Fadd, lhs, rhs); in createFAdd()
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 1323 void Fadd(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fadd() function
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