Home
last modified time | relevance | path

Searched refs:Fcvtzs (Results 1 – 8 of 8) sorted by relevance

/external/v8/src/wasm/baseline/arm64/
Dliftoff-assembler-arm64.h622 Fcvtzs(dst.gp().W(), src.fp().S()); // f32 -> i32 round to zero. in emit_type_conversion()
644 Fcvtzs(dst.gp().W(), src.fp().D()); // f64 -> i32 round to zero. in emit_type_conversion()
674 Fcvtzs(dst.gp().X(), src.fp().S()); // f32 -> i64 round to zero. in emit_type_conversion()
690 Fcvtzs(dst.gp().X(), src.fp().D()); // f64 -> i64 round to zero. in emit_type_conversion()
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc1401 __ Fcvtzs(i.OutputRegister32(), i.InputFloat32Register(0)); in AssembleArchInstruction() local
1409 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
1422 __ Fcvtzs(i.OutputRegister64(), i.InputFloat32Register(0)); in AssembleArchInstruction() local
1435 __ Fcvtzs(i.OutputRegister(0), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
1784 SIMD_UNOP_CASE(kArm64I32x4SConvertF32x4, Fcvtzs, 4S); in AssembleArchInstruction()
/external/vixl/test/aarch64/
Dtest-disasm-aarch64.cc6764 COMPARE_MACRO(Fcvtzs(v4.V2S(), v11.V2S()), in TEST()
6767 COMPARE_MACRO(Fcvtzs(v23.V4S(), v12.V4S()), in TEST()
6770 COMPARE_MACRO(Fcvtzs(v30.V2D(), v1.V2D()), in TEST()
6814 COMPARE_MACRO(Fcvtzs(s24, s25), "fcvtzs s24, s25"); in TEST()
6815 COMPARE_MACRO(Fcvtzs(d26, d27), "fcvtzs d26, d27"); in TEST()
6936 COMPARE_2REGMISC_FP16(Fcvtzs, "fcvtzs"); in TEST()
7373 COMPARE_MACRO(Fcvtzs(v3.V4H(), v1.V4H(), 5), "fcvtzs v3.4h, v1.4h, #5"); in TEST()
7374 COMPARE_MACRO(Fcvtzs(v4.V8H(), v2.V8H(), 6), "fcvtzs v4.8h, v2.8h, #6"); in TEST()
7375 COMPARE_MACRO(Fcvtzs(v5.V2S(), v3.V2S(), 11), "fcvtzs v5.2s, v3.2s, #11"); in TEST()
7376 COMPARE_MACRO(Fcvtzs(v6.V4S(), v4.V4S(), 12), "fcvtzs v6.4s, v4.4s, #12"); in TEST()
[all …]
Dtest-assembler-aarch64.cc14039 __ Fcvtzs(w0, s0); in TEST() local
14040 __ Fcvtzs(w1, s1); in TEST() local
14041 __ Fcvtzs(w2, s2); in TEST() local
14042 __ Fcvtzs(w3, s3); in TEST() local
14043 __ Fcvtzs(w4, s4); in TEST() local
14044 __ Fcvtzs(w5, s5); in TEST() local
14045 __ Fcvtzs(w6, s6); in TEST() local
14046 __ Fcvtzs(w7, s7); in TEST() local
14047 __ Fcvtzs(w8, d8); in TEST() local
14048 __ Fcvtzs(w9, d9); in TEST() local
[all …]
/external/v8/src/arm64/
Dmacro-assembler-arm64.h889 inline void Fcvtzs(const Register& rd, const VRegister& fn);
890 void Fcvtzs(const VRegister& vd, const VRegister& vn, int fbits = 0) {
Dmacro-assembler-arm64-inl.h565 void TurboAssembler::Fcvtzs(const Register& rd, const VRegister& fn) { in Fcvtzs() function
Dmacro-assembler-arm64.cc2029 Fcvtzs(as_int, value); in TryRepresentDoubleAsInt()
2311 Fcvtzs(result.X(), double_input); in TryConvertDoubleToInt64()
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.h1448 void Fcvtzs(const Register& rd, const VRegister& vn, int fbits = 0) {
3112 void Fcvtzs(const VRegister& vd, const VRegister& vn, int fbits = 0) {