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Searched refs:FirstLdSt (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h108 bool shouldClusterMemOps(MachineInstr &FirstLdSt, MachineInstr &SecondLdSt,
DAArch64InstrInfo.cpp1761 bool AArch64InstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps() argument
1769 unsigned FirstOpc = FirstLdSt.getOpcode(); in shouldClusterMemOps()
1776 if (!isCandidateToMergeOrPair(FirstLdSt) || in shouldClusterMemOps()
1781 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp299 bool SIInstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps() argument
305 if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
306 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdst); in shouldClusterMemOps()
310 if (isSMRD(FirstLdSt) && isSMRD(SecondLdSt)) { in shouldClusterMemOps()
311 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::sdst); in shouldClusterMemOps()
315 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
316 (isMTBUF(FirstLdSt) && isMTBUF(SecondLdSt))) { in shouldClusterMemOps()
317 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdata); in shouldClusterMemOps()
335 FirstLdSt.getParent()->getParent()->getRegInfo(); in shouldClusterMemOps()
DSIInstrInfo.h117 bool shouldClusterMemOps(MachineInstr &FirstLdSt, MachineInstr &SecondLdSt,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h131 bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1,
DAArch64InstrInfo.cpp2359 bool AArch64InstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps() argument
2371 if (!isPairableLdStInst(FirstLdSt) || !isPairableLdStInst(SecondLdSt)) in shouldClusterMemOps()
2375 unsigned FirstOpc = FirstLdSt.getOpcode(); in shouldClusterMemOps()
2382 if (!isCandidateToMergeOrPair(FirstLdSt) || in shouldClusterMemOps()
2387 int64_t Offset1 = FirstLdSt.getOperand(2).getImm(); in shouldClusterMemOps()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp404 bool SIInstrInfo::shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps() argument
409 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseReg1, SecondLdSt, BaseReg2)) in shouldClusterMemOps()
415 if ((isMUBUF(FirstLdSt) && isMUBUF(SecondLdSt)) || in shouldClusterMemOps()
416 (isMTBUF(FirstLdSt) && isMTBUF(SecondLdSt)) || in shouldClusterMemOps()
417 (isFLAT(FirstLdSt) && isFLAT(SecondLdSt))) { in shouldClusterMemOps()
422 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdata); in shouldClusterMemOps()
424 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdst); in shouldClusterMemOps()
428 } else if (isSMRD(FirstLdSt) && isSMRD(SecondLdSt)) { in shouldClusterMemOps()
429 FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::sdst); in shouldClusterMemOps()
431 } else if (isDS(FirstLdSt) && isDS(SecondLdSt)) { in shouldClusterMemOps()
[all …]
DSIInstrInfo.h167 bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1,
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h1045 virtual bool shouldClusterMemOps(MachineInstr &FirstLdSt, in shouldClusterMemOps() argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetInstrInfo.h1149 virtual bool shouldClusterMemOps(MachineInstr &FirstLdSt, unsigned BaseReg1, in shouldClusterMemOps() argument