/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 61 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 93 if (Reg == FramePtr) in emitPrologue() 102 if (Reg == FramePtr) in emitPrologue() 136 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 218 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 246 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 254 .addReg(FramePtr)); in emitEpilogue()
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D | ARMFrameLowering.cpp | 137 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 169 if (Reg == FramePtr) in emitPrologue() 178 if (Reg == FramePtr) in emitPrologue() 206 BuildMI(MBB, MBBI, dl, TII.get(ADDriOpc), FramePtr) in emitPrologue() 333 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 364 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 376 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 386 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue() 390 .addReg(FramePtr)); in emitEpilogue() 874 unsigned FramePtr = RegInfo->getFrameRegister(MF); in processFunctionBeforeCalleeSavedScan() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Coroutines/ |
D | CoroSplit.cpp | 93 auto *FramePtr = Shape.FramePtr; in createResumeEntryBlock() local 96 FrameTy, FramePtr, 0, coro::Shape::IndexField, "index.addr"); in createResumeEntryBlock() 113 auto *GepIndex = Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, in createResumeEntryBlock() 120 FrameTy, FramePtr, 0, coro::Shape::IndexField, "index.addr"); in createResumeEntryBlock() 220 static void handleFinalSuspend(IRBuilder<> &Builder, Value *FramePtr, in handleFinalSuspend() argument 231 auto *GepIndex = Builder.CreateConstInBoundsGEP2_32(Shape.FrameTy, FramePtr, in handleFinalSuspend() 295 Value *OldFramePtr = cast<Value>(VMap[Shape.FramePtr]); in createClone() 402 IRBuilder<> Builder(Shape.FramePtr->getNextNode()); in updateCoroFrame() 404 Shape.FrameTy, Shape.FramePtr, 0, coro::Shape::ResumeField, in updateCoroFrame() 418 Shape.FrameTy, Shape.FramePtr, 0, coro::Shape::DestroyField, in updateCoroFrame()
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D | CoroFrame.cpp | 476 auto *FramePtr = in insertSpills() local 500 auto *G = Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, Index, in insertSpills() 533 InsertPt = FramePtr->getNextNode(); in insertSpills() 555 FrameTy, FramePtr, 0, Index, in insertSpills() 582 BasicBlock *FramePtrBB = FramePtr->getParent(); in insertSpills() 584 FramePtrBB->splitBasicBlock(FramePtr->getNextNode(), "AllocaSpillBB"); in insertSpills() 592 Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, P.second); in insertSpills() 599 return FramePtr; in insertSpills() 942 Shape.FramePtr = insertSpills(Spills, Shape); in buildCoroutineFrame()
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D | CoroCleanup.cpp | 51 auto *FramePtr = Builder.CreateBitCast(FrameRaw, FramePtrTy); in lowerSubFn() local 52 auto *Gep = Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, Index); in lowerSubFn()
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 71 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo() 76 FramePtr = X86::EBP; in X86RegisterInfo() 557 if (!MRI->canReserveReg(FramePtr)) in canRealignStack() 589 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex() 591 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex() 595 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex() 636 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex() 659 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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D | X86FrameLowering.cpp | 931 unsigned FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local 934 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue() 1065 .addImm(FramePtr) in emitPrologue() 1073 FramePtr) in emitPrologue() 1252 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), in emitPrologue() 1255 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) in emitPrologue() 1261 .addImm(FramePtr) in emitPrologue() 1351 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitPrologue() 1367 .addReg(FramePtr) in emitPrologue() 1489 unsigned FramePtr = TRI->getFrameRegister(MF); in emitEpilogue() local [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.cpp | 110 unsigned FIOperandNum, int Offset, unsigned FramePtr) { in replaceFI() argument 115 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI() 135 .addReg(FramePtr); in replaceFI() 153 .addReg(FramePtr); in replaceFI()
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.cpp | 110 unsigned FIOperandNum, int Offset, unsigned FramePtr) { in replaceFI() argument 115 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false); in replaceFI() 135 .addReg(FramePtr); in replaceFI() 153 .addReg(FramePtr); in replaceFI()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FrameLowering.cpp | 288 unsigned FramePtr) const { in emitCalleeSavedFrameMoves() 341 if (HasFP && FramePtr == Reg) in emitCalleeSavedFrameMoves() 466 unsigned FramePtr = RegInfo->getFrameRegister(MF); in getCompactUnwindEncoding() local 516 if (DstReg != FramePtr || SrcReg != StackPtr) in getCompactUnwindEncoding() 613 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 698 .addReg(FramePtr, RegState::Kill) in emitPrologue() 720 MachineLocation FPSrc(FramePtr); in emitPrologue() 726 TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr) in emitPrologue() 737 MachineLocation FPDst(FramePtr); in emitPrologue() 745 I->addLiveIn(FramePtr); in emitPrologue() [all …]
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/external/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 107 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 163 if (Reg == FramePtr) in emitPrologue() 240 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 246 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue() 253 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 337 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 366 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 374 .addReg(FramePtr)); in emitEpilogue()
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D | ARMFrameLowering.cpp | 311 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 370 if (Reg == FramePtr) in emitPrologue() 525 dl, TII, FramePtr, ARM::SP, in emitPrologue() 530 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue() 538 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 708 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 746 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 758 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 768 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitEpilogue() 772 .addReg(FramePtr)); in emitEpilogue() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86RegisterInfo.h | 45 unsigned FramePtr; variable 140 unsigned getFramePtr() const { return FramePtr; } in getFramePtr()
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D | X86FrameLowering.cpp | 987 unsigned FramePtr = TRI->getFrameRegister(MF); in emitPrologue() local 990 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr; in emitPrologue() 1136 .addImm(FramePtr) in emitPrologue() 1144 FramePtr) in emitPrologue() 1160 .addImm(FramePtr) in emitPrologue() 1340 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr), in emitPrologue() 1343 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr) in emitPrologue() 1351 .addImm(FramePtr) in emitPrologue() 1443 FramePtr, true, X86FI->getRestoreBasePointerOffset()) in emitPrologue() 1459 .addReg(FramePtr) in emitPrologue() [all …]
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D | X86RegisterInfo.cpp | 66 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo() 71 FramePtr = X86::EBP; in X86RegisterInfo() 631 if (!MRI->canReserveReg(FramePtr)) in canRealignStack() 728 assert(BasePtr == FramePtr && "Expected the FP as base register"); in eliminateFrameIndex() 752 return TFI->hasFP(MF) ? FramePtr : StackPtr; in getFrameRegister()
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/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 184 unsigned FramePtr = XCore::R10; in emitPrologue() local 185 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr) in emitPrologue() 191 MachineLocation SPDst(FramePtr); in emitPrologue() 225 unsigned FramePtr = XCore::R10; in emitEpilogue() local 227 .addReg(FramePtr); in emitEpilogue()
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/external/v8/src/wasm/ |
D | wasm-interpreter.h | 105 using FramePtr = std::unique_ptr<InterpretedFrame, InterpretedFrameDeleter>; variable 133 FramePtr GetFrame(int index);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | Thumb1FrameLowering.cpp | 131 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 187 if (Reg == FramePtr) in emitPrologue() 265 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr) in emitPrologue() 273 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset)); in emitPrologue() 280 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 437 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 466 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 473 .addReg(FramePtr) in emitEpilogue()
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D | ARMFrameLowering.cpp | 376 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue() local 435 if (Reg == FramePtr) in emitPrologue() 593 dl, TII, FramePtr, ARM::SP, in emitPrologue() 598 nullptr, MRI->getDwarfRegNum(FramePtr, true), in emitPrologue() 606 nullptr, MRI->getDwarfRegNum(FramePtr, true))); in emitPrologue() 778 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue() local 816 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes, in emitEpilogue() 828 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes, in emitEpilogue() 838 .addReg(FramePtr) in emitEpilogue() 843 .addReg(FramePtr) in emitEpilogue() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/Coroutines/ |
D | coro-padding.ll | 38 ; CHECK: %[[DATA:.+]] = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 5 44 ; CHECK: %[[DATA:.+]] = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 5
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D | coro-spill-after-phi.ll | 41 ; CHECK: %phi2.spill.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 5 43 ; CHECK: %phi1.spill.addr = getelementptr inbounds %f.Frame, %f.Frame* %FramePtr, i32 0, i32 4
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D | coro-eh-aware-edge-split.ll | 102 ; CHECK: %y.reload.addr = getelementptr inbounds %g.Frame, %g.Frame* %FramePtr, i32 0, i32 6 108 ; CHECK: %x.reload.addr = getelementptr inbounds %g.Frame, %g.Frame* %FramePtr, i32 0, i32 5 164 ; CHECK: %y.reload.addr = getelementptr inbounds %h.Frame, %h.Frame* %FramePtr, i32 0, i32 6 170 ; CHECK: %x.reload.addr = getelementptr inbounds %h.Frame, %h.Frame* %FramePtr, i32 0, i32 5
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D | coro-debug.ll | 130 ; CHECK: define internal fastcc void @f.resume(%f.Frame* %FramePtr) #0 !dbg ![[RESUME:[0-9]+]] 131 ; CHECK: define internal fastcc void @f.destroy(%f.Frame* %FramePtr) #0 !dbg ![[DESTROY:[0-9]+]] 132 ; CHECK: define internal fastcc void @f.cleanup(%f.Frame* %FramePtr) #0 !dbg ![[CLEANUP:[0-9]+]]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable 152 FramePtr)); in GetSpillList() 308 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue() 311 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue() 387 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
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/external/llvm/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable 151 FramePtr)); in GetSpillList() 306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0); in emitPrologue() 309 MRI->getDwarfRegNum(FramePtr, true)); in emitPrologue() 385 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr); in emitEpilogue()
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