Searched refs:GMAC0_DMA_RX_CTRL_ADDR (Results 1 – 2 of 2) sorted by relevance
40 #define GMAC0_DMA_RX_CTRL_ADDR (GMAC0_REG_BASE + 0x220) macro42 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_PTR_OFFSET)44 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_ADDR_LOW_OFFSET)46 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_ADDR_HIGH_OFFSET)48 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_STATUS0_OFFSET)50 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_STATUS1_OFFSET)
134 readl(GMAC0_DMA_RX_CTRL_ADDR), in dma_rx_dump()274 (readl(GMAC0_DMA_RX_CTRL_ADDR) & D64_RC_BL_MASK) in dma_init()454 control = readl(GMAC0_DMA_RX_CTRL_ADDR); in gmac_check_rx_done()513 writel(0, GMAC0_DMA_RX_CTRL_ADDR); in gmac_disable_dma()554 control = (readl(GMAC0_DMA_RX_CTRL_ADDR) & in gmac_enable_dma()571 control |= readl(GMAC0_DMA_RX_CTRL_ADDR) & D64_RC_BL_MASK; in gmac_enable_dma()574 writel(control, GMAC0_DMA_RX_CTRL_ADDR); in gmac_enable_dma()