1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * GTBUS initialisation for sun9i 4 * 5 * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH 6 * Philipp Tomsich <philipp.tomsich@theobroma-systems.com> 7 */ 8 9 #ifndef _SUNXI_GTBUS_SUN9I_H 10 #define _SUNXI_GTBUS_SUN9I_H 11 12 #include <linux/types.h> 13 14 struct sunxi_gtbus_reg { 15 u32 mst_cfg[36]; /* 0x000 */ 16 u8 reserved1[0x70]; /* 0x090 */ 17 u32 bw_wdw_cfg; /* 0x100 */ 18 u32 mst_read_prio_cfg[2]; /* 0x104 */ 19 u32 lvl2_mst_cfg; /* 0x10c */ 20 u32 sw_clk_on; /* 0x110 */ 21 u32 sw_clk_off; /* 0x114 */ 22 u32 pmu_mst_en; /* 0x118 */ 23 u32 pmu_cfg; /* 0x11c */ 24 u32 pmu_cnt[19]; /* 0x120 */ 25 u32 reserved2[0x94]; /* 0x16c */ 26 u32 cci400_config[3]; /* 0x200 */ 27 u32 cci400_status[2]; /* 0x20c */ 28 }; 29 30 /* for register GT_MST_CFG_REG(n) */ 31 #define GT_ENABLE_REQ (1<<31) /* clock on */ 32 #define GT_DISABLE_REQ (1<<30) /* clock off */ 33 #define GT_QOS_SHIFT 28 34 #define GT_THD1_SHIFT 16 35 #define GT_REQN_MAX 0xf /* max no master requests in one cycle */ 36 #define GT_REQN_SHIFT 12 37 #define GT_THD0_SHIFT 0 38 39 #define GT_QOS_MAX 0x3 40 #define GT_THD_MAX 0xfff 41 #define GT_BW_WDW_MAX 0xffff 42 43 /* mst_read_prio_cfg */ 44 #define GT_PRIO_LOW 0 45 #define GT_PRIO_HIGH 1 46 47 /* GTBUS port ids */ 48 #define GT_PORT_CPUM1 0 49 #define GT_PORT_CPUM2 1 50 #define GT_PORT_SATA 2 51 #define GT_PORT_USB3 3 52 #define GT_PORT_FE0 4 53 #define GT_PORT_BE1 5 54 #define GT_PORT_BE2 6 55 #define GT_PORT_IEP0 7 56 #define GT_PORT_FE1 8 57 #define GT_PORT_BE0 9 58 #define GT_PORT_FE2 10 59 #define GT_PORT_IEP1 11 60 #define GT_PORT_VED 12 61 #define GT_PORT_VEE 13 62 #define GT_PORT_FD 14 63 #define GT_PORT_CSI 15 64 #define GT_PORT_MP 16 65 #define GT_PORT_HSI 17 66 #define GT_PORT_SS 18 67 #define GT_PORT_TS 19 68 #define GT_PORT_DMA 20 69 #define GT_PORT_NDFC0 21 70 #define GT_PORT_NDFC1 22 71 #define GT_PORT_CPUS 23 72 #define GT_PORT_TH 24 73 #define GT_PORT_GMAC 25 74 #define GT_PORT_USB0 26 75 #define GT_PORT_MSTG0 27 76 #define GT_PORT_MSTG1 28 77 #define GT_PORT_MSTG2 29 78 #define GT_PORT_MSTG3 30 79 #define GT_PORT_USB1 31 80 #define GT_PORT_GPU0 32 81 #define GT_PORT_GPU1 33 82 #define GT_PORT_USB2 34 83 #define GT_PORT_CPUM0 35 84 85 #define GP_MST_CFG_DEFAULT \ 86 ((GT_QOS_MAX << GT_QOS_SHIFT) | \ 87 (GT_THD_MAX << GT_THD1_SHIFT) | \ 88 (GT_REQN_MAX << GT_REQN_SHIFT) | \ 89 (GT_THD_MAX << GT_THD0_SHIFT)) 90 91 #endif 92