| /external/vixl/src/aarch32/ |
| D | operands-aarch32.cc | 56 if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) && in operator <<()
60 if (operand.GetShift().IsRRX()) { in operator <<()
63 return os << operand.GetBaseRegister() << ", " << operand.GetShift() << " #" in operator <<()
67 return os << operand.GetBaseRegister() << ", " << operand.GetShift() << " " in operator <<()
537 << ImmediateShiftOperand(operand.GetShift(), operand.GetShiftAmount()); in operator <<()
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| D | assembler-aarch32.cc | 1968 Shift shift = operand.GetShift(); in adc()
1994 Shift shift = operand.GetShift(); in adc()
2056 Shift shift = operand.GetShift(); in adcs()
2082 Shift shift = operand.GetShift(); in adcs()
2255 Shift shift = operand.GetShift(); in add()
2299 Shift shift = operand.GetShift(); in add()
2424 Shift shift = operand.GetShift(); in adds()
2468 Shift shift = operand.GetShift(); in adds()
2740 Shift shift = operand.GetShift(); in and_()
2766 Shift shift = operand.GetShift(); in and_()
[all …]
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| D | operands-aarch32.h | 185 Shift GetShift() const { in GetShift() function
823 Shift GetShift() const { return shift_; } in GetShift() function
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| D | disasm-aarch32.h | 428 if ((operand.GetShift().IsLSL() || operand.GetShift().IsROR()) &&
432 if (operand.GetShift().IsRRX()) {
435 return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
439 return *this << operand.GetBaseRegister() << ", " << operand.GetShift()
483 << ImmediateShiftOperand(operand.GetShift(),
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| D | macro-assembler-aarch32.cc | 703 switch (operand.GetShift().GetType()) { in Delegate()
821 switch (operand.GetShift().GetType()) { in Delegate()
1017 switch (operand.GetShift().GetType()) { in Delegate()
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| D | disasm-aarch32.cc | 18186 shift_operand.GetShift().IsLSL() && in DecodeT32()
18252 shift_operand.GetShift().IsLSL() && in DecodeT32()
18431 (shift_operand.GetShift().IsLSL() && in DecodeT32()
18513 shift_operand.GetShift().IsLSL() && in DecodeT32()
18583 shift_operand.GetShift().IsLSL() && in DecodeT32()
18703 if (shift_operand.GetShift().IsLSL() && in DecodeT32()
18769 shift_operand.GetShift().IsLSL() && in DecodeT32()
18839 shift_operand.GetShift().IsLSL() && in DecodeT32()
19087 shift_operand.GetShift().IsLSL() && in DecodeT32()
19157 shift_operand.GetShift().IsLSL() && in DecodeT32()
[all …]
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| D | macro-assembler-aarch32.h | 2472 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || in Mov()
2473 operand.GetShift().Is(ASR))) || in Mov()
2480 (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) || in Mov()
2481 operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) && in Mov()
2508 ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) || in Mov()
2510 operand.GetShift().IsLSL()))) || in Mov()
2514 (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() || in Mov()
2515 operand.GetShift().IsASR() || operand.GetShift().IsROR())) || in Mov()
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| D | instructions-aarch32.h | 1058 const Shift& GetShift() const { return *this; } in GetShift() function
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.h | 817 Shift GetShift() const { in GetShift() function
821 VIXL_DEPRECATED("GetShift", Shift shift() const) { return GetShift(); }
882 Shift GetShift() const { return shift_; } in GetShift() function
883 VIXL_DEPRECATED("GetShift", Shift shift() const) { return GetShift(); }
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| D | macro-assembler-aarch64.cc | 932 operand.GetShift(), in Mov()
1712 Shift shift = mem_op.GetShift(); in ComputeAddress()
1743 (operand.IsShiftedRegister() && (operand.GetShift() == ROR))) { in AddSubMacro()
1832 (operand.IsShiftedRegister() && (operand.GetShift() == ROR))) { in AddSubWithCarryMacro()
1840 VIXL_ASSERT(operand.GetShift() != ROR); in AddSubWithCarryMacro()
1848 operand.GetShift(), in AddSubWithCarryMacro()
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| D | operands-aarch64.cc | 446 shift_ = offset.GetShift(); in MemOperand()
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| D | assembler-aarch64.cc | 5091 VIXL_ASSERT(operand.GetShift() != ROR); in AddSub()
5365 Emit(SF(rd) | op | Flags(S) | ShiftDP(operand.GetShift()) | in DataProcShiftedRegister()
5419 Shift shift = addr.GetShift(); in LoadStoreMemOperand()
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| D | simulator-aarch64.cc | 494 if (mem_op.GetShift() != NO_SHIFT) { in ComputeMemOperandAddress()
495 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in ComputeMemOperandAddress()
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| /external/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-memop-immediate-8192-a32.cc | 3447 memop.GetShift(), in TestHelper()
3490 memop.GetShift(), in TestHelper()
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| D | test-simulator-cond-rd-memop-immediate-512-a32.cc | 3447 memop.GetShift(), in TestHelper()
3490 memop.GetShift(), in TestHelper()
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| D | test-simulator-cond-rd-memop-rs-a32.cc | 3460 memop.GetShift(), in TestHelper()
3504 memop.GetShift(), in TestHelper()
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| D | test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 3456 memop.GetShift(), in TestHelper()
3500 memop.GetShift(), in TestHelper()
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| D | test-simulator-cond-rd-memop-rs-shift-amount-1to31-a32.cc | 3456 memop.GetShift(), in TestHelper()
3500 memop.GetShift(), in TestHelper()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20970 auto GetShift = [&](unsigned OpCode, SDValue V, int Shifter) { in LowerVectorCTPOPBitmath() local
20991 DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 1)); in LowerVectorCTPOPBitmath()
20997 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 2)); in LowerVectorCTPOPBitmath()
21002 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 4)); in LowerVectorCTPOPBitmath()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 24571 auto GetShift = [&](unsigned OpCode, SDValue V, int Shifter) { in LowerVectorCTPOPBitmath() local
24592 DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 1)); in LowerVectorCTPOPBitmath()
24598 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 2)); in LowerVectorCTPOPBitmath()
24603 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 4)); in LowerVectorCTPOPBitmath()
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